Multi-domain ferroelectricity as a limiting factor for voltage amplification in ferroelectric field-effect transistors

We revise the possibility of having an amplified surface potential in ferroelectric field-effect transistors pointed out by [S. Salahuddin and S. Datta, Nano Lett. 8, 405 (2008)]. We show that the negative-capacitance regime that allows for such an amplification is actually bounded by the appearance of multi-domain ferroelectricity. This imposes a severe limit to the maximum step-up of the surface potential obtainable in the device. We indicate new device design rules taking into account this scenario.

We revise the possibility of having an amplified surface potential in ferroelectric field-effect transistors pointed out by S. Salahuddin and S. Datta [Nano Lett. 8, 405 (2008)]. We show that the negative-capacitance regime that allows for such an amplification is actually bounded by the appearance of multi-domain ferroelectricity. This imposes a severe limit to the maximum step-up of the surface potential obtainable in the device. We indicate new device design rules taking into account this scenario.
The operation of field-effect transistors (FETs) generates a heat whose dissipation imposes severe restrictions to the miniaturization of integrated circuits. The lowering of the FET operating voltage is therefore highly desirable, which has to be accompanied with a reduction of the threshold voltage to mantain performaces. This, however, implies the increse in the stand-by power since the inverse of the so-called subthreshold slope appears limited to 60 mV/decade at room temperature. At present, this is considered as an important roadblock for the transistor scaling down [1]. Recently Salahuddin and Datta have suggested that the 60 mV/decade limit can be overcome in ferroelectric FETs as the sketched in Fig  1 [2]. These FETs has a long history as canditates for nondestructive readout memory elements [3]. The idea of Salahuddin and Datta is to exploit a negative capacitance regime of the ferroelectric in which the surface potential of the semiconductor V s is up-converted and therefore the so-called body factor of the transistor m ≡ (∂V s /∂V g ) −1 , where V g is the gate potential, becomes smaller than one.
The physics behind this negative capacitance regime is associated to depolarizing field effects, i.e., the electric field that accompanies the polarization of the (finitesize) ferroelectric. As a result of this field, there is a shift in ferroelectric transition point and the ferroelectric can operate in its (otherwise unstable) paraelectric state. What is more, in such a state, the voltage drop ∆V through the ferroelectric decreases by increasing the gate voltage. This yields the desired amplification, since the changes in the surface potential V s are then larger than the ones in the gate voltage (V g = ∆V + V s ). This possibility is explained in Fig. 2. Here we plot the load line Q = C s V s = C s (V g − ∆V ), where Q and C s are the charge and the semiconductor capacitance respectively, and the Q(∆V ) characteristic of the ferrolectric. The slope of this later is always positive if the ferroelectric is well inside its paraelectric phase [ Fig. 2 (a)] and therefore the intersection between this function and the load line shifts towards higher voltages if the gate voltage is increased. The ferroelectric then behaves as the conventional oxide in the FET. However, when the ferroelec-tric Q(∆V ) characteristic adquires its S-shaped form, its slope is negative for ∆V = 0 [ Fig. 2 (b) and (c)]. This happens below the nominal transition temperature of the ferroelectric (see below). If such a slope is more negative than −C s [ Fig. 2 (b)], then the intersection with the load line shifts towards lower voltages as the gate voltage increases. This means that the surface potential is enhanced as we explained before, which can associated with a negative-capacitance behavior of the ferroelectric. If the ferroelectric Q(∆V ) characteristic gets sufficiently flat for low voltages then there appears three points of intersection with the load line [ Fig. 2 (c)], from which only the marked with dots correspond to stable states for the ferroelectric (now in its ferroelectric state). The voltage amplification holds until these points shift again towards higher values if the gate voltage is increased as shown in Fig. 2 (c). This eventually translates into hysteresis loops for gate voltages varying cyclically from positive to negative.
According to these reasonings, the maximum amplification of the gate potential is expected to be limited by the eventual transition into the ferroelectric state. Salahuddin and Datta have tacitly assumed that this transition implies the single-domain state in which the spontaneous polarization is uniform through the ferroelectric. The actual situation, however, can be far more subtle. As a result of the depolarizing field the ferroelectric instability is generally equivalent to the appearance   of multi-domain ferroelectricity in which the polarization varies in space, with transition temperature shifts rather different from the assumed by Salahuddin and Datta [4]. The aim of this paper is to show that the negative capacitance regime then gets saturated, which puts severe limits to the maximum amplification of the gate voltage that can be obtained in ferroelectric FETs.
To obtain the response of the FET to the applied voltage we follow the Landau-like approach described in [4]. On one hand, the behavior of the ferroelectric is described by the equations Here P is the distribution of polarization along the ferroelectric z-axis and V the electrostatic potential in the ferroelectric. Eq. (1a), which can be derived from a Ginzburg-Landau-Devonshire free energy, represents the constitutive equation for the ferroelectric whose electrostatics, as follows from Maxwell's equations, is eventually determined by Eq. (1b). The instability that gives rise to ferroelectricity is described by the vanishing of the coeffient a = a (T − T 0 c ) as usual, where T 0 c is the nominal transition temperature (in the absence of depolarizing field) while the rest of coefficients are assumed to be positive constants. We thus assume a second-order (continuous) phase transition, which a priori is the most favorable scenario for the amplification of the FET gate voltage. On the other hand, the semiconductor is assumed to be undoped (or lighly doped) operating within its subthreshold regime as in Ref. [2]. Thus, its mobile carrier density can be neglected and we simply have the equation ∇ 2 V s = 0 for the electrostatic potential in the semiconductor. At the ferroelectric-semiconductor interface these quantities have to satisfy the electrostatic matching conditions V = V s and ε 0 ∂ z V − P = ε s ∂ z V s , where ε s is the dielectric constant of the semiconductor [5]. In addition, we have the boundary conditions V = V g at the gate and V s = 0 in the semiconductor beyond its depletion layer (see Fig. 1). V g is assumed to be below the FET threshold voltage in the following.
As long as the ferroelectric stays in its paraelectric phase the body factor of the FET is given by Here l and w represent the thickness of the ferroelectric and the width of the semiconductor depletion layer respectively. Noting that ε 0 |a| 1 in the vicinity of the ferroelectric instability one obtains m 1 + ε s l w a = 1 + Cs C F E , where C s = ε s /w and C F E = 1/(al), which is the result reported by Salahuddin and Datta [2]. The desired up-conversion of the surface potential is obtained if the body factor is m < 1. This is possible if the bare polarization stiffness a gets negative and hence the ferroelectric can act as a negative capacitance (C F E < 0). If depolarizing fields were totally screened, that would mean the instability of the paraelectric phase with respect the spontaneous polarization of the system. This polarization, however, is accompained with some depolarizing field in the FET, which produces an increase in the polarization stiffness. In consequence, the ferroelectric can remain in its paraelectric phase even if the bare stiffness is a < 0. In fact, the ferroelectric can be proven to be stable with respect to uniform distributions of polarization up to the point a * = − 1 ε0+εsl/w where the expression (3) for the body factor would give zero. This point, however, generally does not correspond to the transition point in the ferroelectric FET as we show in the following.
The actual phase transition point is determined by the point at which the equations (1) have their first nontrivial solution (P = 0) for V g = 0. This can be found by following the general procedure outlined in [4]. For the FET geometry and the typical values for the depletion width of ligthly doped semiconductors (w ∼ 0.1 − 1 µm), such a solution corresponds to a polarization wave P 0 (x, z) = p 0 cos(k x x) cos(k z z), with k z = π 2l and k x = (ε c) −1/4 π 2l 1/2 , and appears at The parameters entering in this expression can be estimated as ε /ε 0 ∼ 1−100 and c ∼ d 2 at /ε 0 , where d at is the characteristic atomic distance (c ∼ 10 −9 −10 −11 Jm 3 /C 2 , see e.g. [6]). In the FET setups w, l d at , and consequently a c a * . So, in fact, much before the paraelectric phase can get unstable with respect to the uniform polarization, the ferroelectric transits into its (multi-domain) ferroelectric phase at a c . At this point, the body factor (3) takes the value which we anticipate to be the minimum obtainable in the ferroelectric FET. It is worth noting that m min depends on material parameters of both the semiconductor and the ferroelectric, but not on the thickness of this latter. The above numbers give m min ∼ 0.99 only, though this could be further reduced to ∼ 0.7 considering the stateof-the-art semiconductor capacitance C s = 0.1 F/m 2 (which however requires strong doping and therefore is beyond our model).
As we have mentioned, the expression (2) for the body factor is valid as long as the ferroelectric stays in its paraelectric phase. That is, for a ≥ a c . To obtain the corresponding expression for a ≤ a c it is important to take into account that there is a non-zero background polarization in the ferroelectric. Close to the transition point such a polarization is well described by the polarization wave P 0 found before and, to our purposes, higher harmonics can be neglected. Within this approximation the amplitude of the polarization wave is p 0 ± 4 3 |a − a c |/b. Furthermore we express the total polarization as P tot = P 0 (x, z) + δP , where δP is due to the applied gate voltage, and linearize the equations with respect to this quantity (P 3 tot P 3 0 + 3P 2 0 δP ). We then obtain the body factor As we see, the body factor in fact increases once the ferroelectric enters in its (multi-domain) ferroelectric phase. This hardening results from the cubic P 3 term that eventually stabilizes the system. Nevertheless, the ferroelectric stays in the negative capacitance regime for some range of temperatures below the transition point. The precise computation of this range requires to go beyond the single harmonic approximation to describe properly the evolution of the ferroelectric ground state, which is beyond the scope of the present work. It is worh mentioning that the negative capacitance regime in the (multidomain) ferroelectric phase also manifests in the unusual hysteresis loops with negative slopes described in Ref. [7] to rationalize experimental data on ferroelectric thin films [8]. The behavior of the body factor is illustrated in Fig 3 as a function of the control parameter a. The maximum amplification of the gate voltage corresponds to Eq. (4) at the transition point a c . We note that, in order to obtain a significant gain, the semiconductor capacitance should be engineered to be C s = 1 π c per surface area. This design rule is independent of the ferroelectric thickness. Such a thickness simply sets the amplification window that, for practical purposes, has to be tuned about room temperature. In a multi-domain scenario the gradient coefficient c plays a more important role, giving the above design rule in sharp contrast the reported in Ref. [2].
In conclusion, we have shown that appearance of multidomain ferroelectricity may substantially limit the maximum voltage amplification expected in ferroelectric fieldeffect-transistors.