Low-Temperature Growth of Axial Si/Ge Nanowire Heterostructures Enabled by Trisilane

Axial Si/Ge heterostructure nanowires, despite their promise in applications ranging from electronics to thermal transport, remain notoriously difficult to synthesize. Here, we grow axial Si/Ge heterostructures at low temperatures using a Au catalyst with a combination of trisilane and digermane. This approach yields, as determined with detailed electron microscopy characterization, arrays of epitaxial Si/Ge nanowires with excellent morphologies and purely axial composition profiles. Our data indicate that heterostructure formation can occur via the vapor–liquid–solid or vapor–solid–solid mechanism. These findings highlight the importance of precursor chemistry in semiconductor nanowire synthesis and open the door to Si/Ge nanowires with programmable quantum domains.

Control of composition at the nanoscale is central to the construction and operation of devices ranging from field effect transistors to solar cells. [1][2] It is also critical for advanced materials where the arrangement of nanoscale constituent elements gives rise to exotic properties. [3][4][5] The vapor-liquid-solid (VLS) mechanism, which permits the encoding of different materials and/or compositions along the length of semiconductor nanowires, provides one route to programmable compositional heterogeneity. [6][7][8][9] Group III-V nanowires, due to the low solubility of group V atoms in the catalyst droplet and the wide parameter space offered by the use of two precursors (i.e., for delivering group III and V atoms), currently offer the best control of axial heterostructure. Axially embedded quantum dots can be fabricated with heights ranging from one to several bilayers. [10][11] Axial heterostructure formation remains challenging for group IV nanowires. 12 Yet, the promise of these heterostructures in applications such as transistors [13][14][15] for large-area integrated circuits and thermoelectrics [16][17][18] , where low cost, low toxicity, and thermal stability are paramount, continues to motivate work in this area. To date, the large majority of axial Si/Ge heterostructure nanowire syntheses yield non-ideal structural motifs including diameter changes, [19][20] sidewall deposition, 9,21 kinking, 8,[22][23] and/or crystallographic defects. 22 Si/Ge heterostructure nanowires without these unwanted structural motifs are possible, but with growth rates usually too rapid to encode highly confined structures. [24][25] In many cases, co-flow of a second precursor, such as HCl, is also necessary to improve sidewall morphology. [26][27] This approach, however, requires careful control of growth conditions to prevent surface roughening from halogen-induced surface atom removal (e.g., as SiX 2 or GeX 2 where X = Cl or Br). [28][29][30] A notable exception to the above challenges is vapor-solid-solid (VSS) growth with an alloyed catalyst (e.g., Au/Al, Au/Ag), which is able to produce sub-5 nm Ge domains along the length of Si nanowires. [31][32] Here, we demonstrate arrays of axial Si/Ge heterostructure nanowires with excellent sidewall morphologies and purely axial composition profiles. We use the precursors trisilane (Si 3 H 8 ) and digermane (Ge 2 H 6 ) for Si and Ge segment growth, respectively, with a conventional Au catalyst. Trisilane is highly reactive, enabling Si homoepitaxy as low as 300 °C. 33 This precursor choice is motivated by the reduced H 2 desorption rate on both Si [34][35] and Ge 36-37 surfaces at these temperatures. The nanowire sidewalls are expected to remain largely hydrogen-passivated during Si/Ge heterostructure formation, and limit the catalyst perturbations that can lead to poor morphologies, kinking, and defects. This approach also offers growth rates slow enough for quantum dot and/or superlattice fabrication. METHODS. All nanowires are synthesized in a custom-built ultra-high vacuum (UHV) chamber with a base pressure of 3 × 10 -10 Torr (McAllister Technical Services). A description of the chamber and substrate preparation methods are included in prior studies. [38][39] Briefly, substrates are cut into rectangles (6 mm × 24 mm) from a double-side polished Ge(111) wafer (MTI Corp., CZ, 500 µm, 42-64 Ω-cm). Each substrate is repeatedly oxidized in 3 wt% H 2 O 2 (JT Baker, 30 wt%, ACS grade), etched with 9 wt% HCl (JT Baker, CMOS grade), cleaned with dionized water, and dried with N 2 gas. The substrate is then immersed in a 1:2:20 NH 4 OH (Sigma-Aldrich, 28-30 wt%, ACS grade):H 2 O 2 :H 2 O solution, rinsed with dionized water, and dried with N2 gas. Upon insertion into the UHV chamber, the substrate is heated to 485 °C to desorb the chemical oxide from the wet chemical treatment, followed by epitaxial Ge film deposition at 305 °C with a Ge 2 H 6 (Air 2 Liquide, 20% in He) partial pressure of 2 × 10 -5 Torr. Finally, a thin layer of Au (< 0.5 nm) is deposited onto the substrate at room temperature via thermal evaporation (SVT Associates). The substrate temperature is monitored throughout the nanowire growth by a calibrated infrared pyrometer (Mikron) focused on the backside of the substrate.
Nanowire growth begins with the same procedure utilized in a recent study. 37 Briefly, Ge 2 H 6 at a partial pressure of 1 × 10 -4 Torr is introduced to the chamber with the substrate at room temperature. The substrate is then heated to 485 °C at a rate of 10 °C/s, held for 30 s, and cooled to 305 °C at a rate of 3 °C/s. A short Ge nanowire "stub" results from growth at these conditions for 5 min. While maintaining the Ge 2 H 6 partial pressure, the substrate temperature is lowered to 290 °C and the remainder of the Ge segment is grown over the course of 30 min. Si segment growth is initiated by flowing Si 3 H 8 followed by termination of Ge 2 H 6 flow. The Si segment is elongated at either 290, 310, or 330 °C with a Si 3 H 8 (Air Liquide, 99.99%) partial pressure of 1 × 10 -4 Torr for 30 min. For Ge/Si/Ge heterostructures growth, Ge 2 H 6 is re-introduced at a partial pressure of 1 × 10 -4 Torr prior to termination of Si 3 H 8 flow. All segments of Ge/Si/Ge nanowires are synthesized at 290 °C. Growth is terminated by rapidly reducing substrate temperature, after which all precursors are evacuated from the chamber.
Nanowire structure is analyzed with a Hitachi SU-8230 scanning electron microscopy (SEM) and a FEI Tecnai F20 transmission electron microscope (TEM). For TEM measurements, nanowires are transferred to carbon-coated grids (Ted Pella) by a direct mechanical transfer method. 40 High resolution TEM (HRTEM) images are obtained with a 0.19 nm point-to-point resolution at 200 keV. For the compositional maps and profiles, we combine scanning TEM (STEM) with electron energy loss spectroscopy (EELS) in the same FEI Tecnai F20. An embedded Gatan image filter is used for EELS analyses. EELS can provide atomic-level spatial resolution for sufficiently thin samples. 41 For nanowires with diameters similar to those studied here, typical signal broadening at heterointerfaces is less than 2 nm. Heterointerfacial strain is analyzed by the geometric phase analysis (GPA) method. 42 The GPA algorithm performs an analysis based on the amplitude and phase of the lattice fringes as a function of position in the HRTEM images at different Bragg reflection angles. A cosine type mask with the radius previously optimized is employed around the (1 -1 -1) growth plane for all nanowires. RESULTS & DISCUSSION. Figures 1a and 1b show representative SEM images of Si/Ge nanowire arrays where the Si segment is grown at 290 and 330 °C, respectively. Si segment growth at 310 °C yields a similar morphology (Supporting Information, Figure S1). Nanowire morphology and crossarray uniformity is excellent (> 98% verticality) for all temperatures (Supporting Information, Figure S2). Nanowires exhibit an epitaxial orientation relative to the Ge(111) substrate, indicating their growth is in the <111> direction. As anticipated for a Si/Ge heterostructure, the images in the Figure 1a and 1b insets show a bright segment (Ge) below a dark (Si) segment. The heterostructure forms properly in almost every nanowire. The growth rate of the initial Ge segment is ~10.6 nm/min, as expected for growth at 290 °C. 39 The Si segment growth rate is far lower at ~0.45, 0.96, and 1.64 nm/min for 290, 310, and 330 °C, respectively.
Detailed structural analysis confirms the single-crystallinity and growth direction of the Si/Ge heterostructure nanowires. Figure 2a shows a representative bright field TEM image of the near-catalyst region of a Si/Ge heterostructure nanowire with Si segment growth at 290 °C. Lattice fringes are clearly visible, demonstrating that the nanowire remains singlecrystalline across the Si/Ge heterointerface. Figures 2b,c and 2d,e show high resolution TEM (HRTEM) images along the [1][2][3][4][5][6][7][8][9][10][11][12] zone axis and associated Fast Fourier Transform (FFT) for the nominally Si (blue box) and Ge (red box) segments, respectively. Both segments grow along the <111> direction. Electron energy loss spectroscopy (EELS) measurements confirm the chemical identity of the Si and Ge segments. Figure 3a shows a representative high angle annular dark field STEM (HAADF-STEM) image of a nanowire containing Si/Ge nanowires with the Si segment grown at 290 °C. A contrast change near the catalyst is observed similar to that seen in Figure 1. As would be expected for hydrogen-passivated sidewalls, 43 gold is only observed in the catalyst region. EELS maps of Si (blue) and Ge (red) are also shown in Figure 3a and definitively confirm the presence of Si and Ge segments. The top of each map is the liquid-solid interface.
The Si/Ge heterointerface is compositionally graded along the axial direction, as seen in Figure 3b, for all temperatures 3 studied here. A transition width of approximately 20 and 35 nm is observed for Si segment growth at 290 and 330 °C, respectively, and is considerably less than the nanowire diameter. [24][25] We discuss the observed compositional grading in more detail below. In addition, the absence of Si on the sidewall of the Ge -segment (Supporting Information, Figure S3) confirms that the heterostructure exhibits a purely axial composition profile. This observation provides additional support that the sidewall is well passivated. We quantify heterointerfacial strain, as shown in Figure 4, by combining HRTEM with geometric phase analysis (GPA). A transition region (green) between the Ge (red) and Si (blue) regions is clearly observed in the GPA maps. This transition is consistent with the axial compositional grading seen in the EELS data ( Figure 3) and is analogous to recent reports for axial III-V heterostructures. [44][45] The lattice mismatch is calculated to be -3.7% and -3.9% for Si segment growth at 290 and 330 °C, respectively, which is close to that expected for an ideally relaxed bulk Si/Ge heterointerface (approximately -4.0%). We attribute the larger deviation from ideality for Si segment growth at 290 °C (-3.7 vs. -4.0%) to the length of the Si segment, which is shorter and thus remains more strained than the Si segment grown at 330 °C (-3.9 vs. -4.0%). Nanowires containing Ge/Si/Ge heterostructures are also synthesized as shown in Figure 5. All segments are grown at 290 °C for 30 min. A HAADF STEM image and the corresponding EELS composition map is displayed Figure 5a. A distinct Si segment is visible between two Ge segments, which confirms that Si crystallization is occurring under growth conditions. The HRTEM image in Figure 5b shows that the nanowire remains single-crystalline across both heterostructures. The EELS composition profile in Figure 5c, similar to Figure  3b, shows how the initially grown Si/Ge heterointerface exhibits a graded composition. Interestingly, the subsequently grown heterointerface is more abrupt.
Our data show that the use of a Si 3 H 8 and Ge 2 H 6 chemistry solves many, but not all, of the challenges of conventional hydrides for Si/Ge heterostructure formation. Foremost, the near-unity fraction of nanowires containing Si/Ge heterostructures without kinks or defects (Figures 1, S1, S2), as well as the absence of radial composition grading ( Figure S3), supports the presence of a robust, likely hydrogen, sidewall passivation. Additional studies are required to definitively Page 3 of 8 1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58 59 60 identify the catalyst's phase during Ge to Si and Si to Ge transitions, but the present data provides important clues. The slow growth rate of the second Ge segment, especially relative to the first Ge segment (i.e., ~0.5 vs. ~10 nm/min), indicates that the catalyst solidified during or prior to the Si to Ge transition. 49 The low solubility of semiconductor atoms in solid catalysts also results in more abrupt heterointerfaces, 32 as seen here for the Si to Ge transition. The larger composition grading observed for the Ge to Si transition, however, suggests that the catalyst was still liquid at that point during growth. Graded composition profiles are commonly observed for axial heterointerfaces synthesized with the VLS mechanism and attributed to the so-called "reservoir effect". [46][47] While not as widely studied as Ge nanowire growth via the VLS growth mechanism below the bulk eutectic temperature, 39,[48][49] Si nanowires have also been reported to grow via this mode.50 The presence of a liquid catalyst droplet for Si nanowire growth below the bulk eutectic temperature is supported by prior studies of Ge nanowire growth by us 43 and others. 49 In particular, we recently showed that hydrogen-passivated sidewalls maintain Au/Ge catalysts in a metastable liquid state below the bulk eutectic temperature. 43 A similar situation is likely present for low temperature Si segment growth with Si 3 H 8 . Adsorbed hydrogen atoms prevent catalyst atoms from accessing the sidewall and, in doing so, prevent the Au/Si catalyst from solidifying. The same mechanism can explain why the catalyst appears to solidify upon reintroducing Ge 2 H 6 . The presence of Ge atoms in the trijunction region increases the hydrogen atom desorption rate (as H 2 ) enough to permit atomic transport to the sidewall and identification of a low barrier site for nucleation (i.e., catalyst solidification). Identification of a root cause for the temperature-dependent transition width seen in Figure 3 is still under investigation, but is likely of kinetic origin. Since the solubility of semiconductor atoms in the catalyst droplet changes only a few percent over the temperature range studied here, thermodynamics cannot fully explain the ~50% change in transition width over 40 °C. 49 Recent work has shown that a backward reaction pathway can transfer atoms from the liquid catalyst to the gas phase, [51][52] an effect that is particularly pronounced in crystallization-limited situations. The smaller transition width observed here at lower temperature ( Figure 3) is consistent with this pathway. When crystallization is limiting, as is likely under the low temperature conditions studied here, catalyst composition will be dominated by atomic delivery/removal at the catalyst-vapor interface. In this situation, as observed here, conditions that increase the stability of gas phase product species (e.g., GeH x ), including a reduced temperature, would fa-5 vor atomic removal from the catalyst and result in a more abrupt heterointerface. CONCLUSION. We demonstrate the low temperature growth of axial Si/Ge heterostructures with a combination of Si 3 H 8 and Ge 2 H 6 . Our approach prevents the catalyst perturbations that result in poor morphologies, kinks, and defects. A robust sidewall passivation is likely responsible for these observations, but additional work is required to demonstrate this directly. Our experiments show that precursor design is a powerful method to control bottom-up nanowire growth, and enable nanostructures that were previous challenging or off-limits.

Supporting Information
Additional figures of cross-sectional SEM images of nanowire arrays and radial EELS composition profiles, as referenced in the main text. The Supporting Information is available free of charge on the ACS Publications website.

Author Contributions
HYH grew the nanowires and collected the SEM data. HYH and MAF jointly analyzed the data and wrote the manuscript. JA and MdlM collected and analyzed the TEM data. All authors approved the final version.