Understanding the Bias Dependence of Low Frequency Noise in Sin-gle Layer Graphene FETs

This letter investigates the bias-dependent low frequency noise of single layer graphene field-effect transistors. Noise measurements have been conducted with electrolyte-gated graphene transistors covering a wide range of gate and drain bias conditions for different channel lengths. A new analytical model that accounts for the propagation of the local noise sources in the channel to the terminal currents and voltages is proposed in this paper to investigate the noise bias dependence. Carrier number and mobility fluctuations are considered as the main causes of low frequency noise and the way these mechanisms contribute to the bias dependence of the noise is analyzed in this work. Typically, normalized low frequency noise in graphene devices has been usually shown to follow an M-shape dependence versus gate voltage with the minimum near the charge neutrality point (CNP). Our work reveals for the first time the strong correlation between this gate dependence and the residual charge which is relevant in the vicinity of this specific bias point. We discuss how charge inhomogeneity in the graphene channel at higher drain voltages can contribute to low frequency noise; thus, channel regions nearby the source and drain terminals are found to dominate the total noise for gate biases close to the CNP. The excellent agreement between the experimental data and the predictions of the analytical model at all bias conditions confirms that the two fundamental 1/f noise mechanisms, carrier number and mobility fluctuations, must be considered simultaneously to properly understand the low frequency noise in graphene FETs. The proposed analytical compact model can be easily implemented and integrated in circuit simulators, which can be of high importance for graphene based circuits design.


Introduction
The outstanding characteristics of graphene such as its high carrier mobility and saturation velocity has attracted significant interest to use this material in future high-performance, high frequency electronics. Although its gapless nature renders it inappropriate for digital circuitry, it can result in a tremendous performance boost in both analog and radio frequency (RF) applications [1][2] . In addition, graphene could also be successfully used in chemical, biological sensors [3][4][5][6][7][8][9] as well as in optoelectronic devices 10 . Such applications, though, are extremely prone to Low Frequency Noise (LFN) which can limit the sensitivity of sensors and can also be up-converted to undesired phase noise in voltage controlled oscillators. Furthermore, LFN is a very powerful tool for characterizing the quality and reliability of graphene devices [11][12] . LFN is also referred to as 1/f (flicker) noise when its Power Spectral Density (PSD) is inversely proportional to frequency, which is usually the case in devices with channel lengths typically longer than few hundreds of nanometres. The capture and subsequent emission of charges at border traps near the dielectric interface of oxide semiconductors is the main effect responsible for the generation of LFN 13 . Each carrier that gets trapped causes a Random Telegraph Signal (RTS) in time domain, corresponding to a Lorentzian spectrum determined by a time constant. The high number of such Lorentzians in large devices and the uniform spatial distribution of these traps that results in a uniform distribution of time constants, are responsible for the 1/f behavior of noise. This noise mechanism is called carrier number fluctuation effect (ΔN) and was first proposed by McWhorter 14 . This phenomenon is adequately described by a number of basic LFN models for metal-oxide-semiconductor fieldeffect transistors (MOSFETs) available in bibliography [15][16][17][18][19] . In addition to carrier number, mobility fluctuation (Δμ) is also considered a main contribution to LFN in semiconductor devices and can be generated due to fluctuations in the scattering cross-section of scattering centres. This effect is described by the empirical Hooge formula 20 . In this letter we focus on the effect of LFN on single layer graphene devices (GFETs) and more specifically on long channel solution-gated transistors 21 , which are broadly used in biosensing and bioelectronics applications (Fig. 1a). (Details on the fabrication of these devices can be found in Experimental Data section). A map of the 2D/G Raman bands intensity ratio and the average Raman spectrum over the graphene channel are shown in Fig. 1b and 1c respectively. According to the values of the 2D/G band intensity map, a low second nucleation density as well as a relatively good SLG homogeneity can be derived. The D/G ratio in the average spectrum indicates a low density of defects in the graphene channel. Flicker noise which prevails in these transistors, is of high interest because of its unique characteristics 22 . As a semimetal, graphene presents mobility fluctuations which can generate 1/f noise. On the other hand, singlelayer graphene (SLG), as a 2D material is extremely prone to trapping effects leading to high amplitude carrier number fluctuations. In fact, a recent study illustrated that LFN can either be dominated by carrier number fluctuations (surface noise) or mobility fluctuations (volume noise) effect depending on the number of Graphene layers 23 ; the lower this number the more dominant the surface LFN is. The addition of these two contributions, combined with the unusual transfer characteristics of graphene FETs and the noise originated at the contacts 24 leads to a rather complex dependence of noise on the gate voltage. More specifically, it has been stated that 1/f noise follows a V-shape dependence close to the Dirac or charge neutrality point (CNP) with the minimum of the V-shape at this gate voltage; this behavior can turn into an M-shape in case the gate bias is extended 4,[25][26][27][28][29][30][31][32][33] . The gate dependence has been shown to strongly depend on the spatial charge inhomogeneity related to the presence of both electron and hole puddles near the CNP 31 and it has been observed in both top-gated 4, 25-30 and back-gated [26][27][28][31][32][33] devices. We will also show that the charge inhomogeneity induced in graphene devices at higher drain voltage values, which is more (Back gate is not active in devices under test of (a) but is included in the capacitive network of (d) to support the generalizability of the model) Drain current ID vs top gate voltage (VGS -VCNP) measured in solution -gated GFETs with e) W=40 μm for different channel length values (L=43, 23, 13, 8, 5.5 μm) at VDS=20 mV and f) VDS=20, 40, 60 mV for L=43, 5.5 μm. Symbols: experimental data, solid lines: model. intense at CNP, has a significant effect on the LFN. In case of GFETs on particular substrates such as boron nitride, not only 1/f noise is reduced in comparison to standard SiO2 substrates but also the M-shape is eliminated or almost disappears [31][32] . It will be shown that the latter occurs in cases where less charge is induced by impurities near CNP, also known as residual charge 34 . Furthermore, flicker noise is shown to be reduced after the effect of electron-beam irradiation 35 while the introduction of graded thickness throughout the graphene channel, with a single layer in the middle and two or more layers close to the contacts, also reduces 1/f noise whereas it still ensures a high mobility 36 . Classical Hooge formula alone cannot predict such M-shape behavior since residual charge does not play a significant role as it will be shown and this can only lead to a Λ-shape gate bias dependence 37 . On the other hand, V and M shapes can be explained in terms of carrier number fluctuations due to charge trapping/detrapping processes 26,28 . There have been several attempts to model 1/f noise in GFETs considering either carrier number fluctuations 4, 38-42 (ΔN) or mobility fluctuations effects 27 (Δμ), while in some cases both effects have been taken into account simultaneously 28 . Usually noise models are taken from conventional Si devices 4,28,[41][42] assuming that noise is homogeneously generated over the channel. This assumption is consequence of considering charge to be homogeneously distributed along the channel leading to a carrier number noise which is proportional to the transconductance 4 . In few reports, detailed formulas are derived; however, they are not compact [38][39][40] and, thus, they cannot be solved analytically by a circuit simulator. Finally, in some cases there is no validation of the proposed models with experimental data [39][40][41] . It is clear that there is still missing a complete approach that combines physics validity with analytical equations that can be easily integrated in a circuit simulator and provide fast and robust solutions.

Results and Discussion
Thus, the main goal of this work is to propose a physics-based model which accounts for both carrier number and mobility fluctuation noise sources inhomogeneously distributed over the graphene channel and which can be solved analytically.
Furthermore, we validate that the developed model can accurately capture the experimentally obtained M-shape gate dependence of 1/f noise data measured in solution-gated GFETs at different bias conditions and for several channel lengths.
Residual charge, which is dominant near CNP, will be shown to be responsible for the M-shape dependence, however channel charge inhomogeneity is also found to be significant to the LFN minimum at CNP. As well as this, ΔN model is the main 1/f noise contributor for SLG FETs as it was expected 23 but Δμ also contributes near CNP. The contact resistance has a significant effect on 1/f noise at high gate voltages because of the increased and bias dependent contact resistance experimentally observed in this regime 24 . The model also works properly for data from solid-gated GFETs taken from bibliography 30,[32][33] . The basic methodology for the derivation of the physics-based 1/f noise equations in this work is based on a procedure developed for MOSFET devices 15,19,[43][44] . The implementation of a correct 1/f noise model requires the existence of a reliable current -voltage (I-V) model that can qualitatively capture the bias dependence of the drain current of the device. Since LFN expresses the fluctuation of current, thus the absolute current has to be well described. The model for 1/f noise in GFETs has been implemented considering the chemical potential based compact model reported in Refs. 45-46. According to this model, a GFET can be represented by the equivalent capacitive circuit shown in Fig. 1d. Graphene charge Qgr is stored in the quantum capacitance (Cq); the chemical potential Vc(x) represents the voltage drop across Cq at position x. Vc(x) is defined as the difference between the potential at quasi-Fermi level and the potential at the CNP, as shown in the energy dispersion relation scheme of graphene in Fig. 1d where Vc(0)=Vcs at the source end (x=0) and Vc(L)=Vcd at the drain end (x=L). VGS-VGS0, VBS-VBS0 are the top and back gate source voltage overdrives while Ctop and Cback are the top and back gate capacitances, respectively. The quasi-Fermi potential V(x) is the voltage drop in the graphene channel at position x, which is equal to zero at the source end (x=0) and equal to VDS at the drain end (x=L). Drain-to-source current and 1/f noise spectra were measured in single layer, top liquid-gated GFETs with W=40 μm and five different channel lengths (L=43, 23, 13, 8, 5.5 μm) (See Experimental Data section). Data were obtained from 4 samples for L=5. 5,8,23 μm, 3 samples for L=13 μm and 2 samples for L=43 μm, at three different drain voltage levels (VDS=20, 40 and 60 mV). Top gate potential was swept from VGS=-0.4 to 0.6V with a step of 20 mV, covering the whole range from strong p-type conduction to strong n-type conduction. These extended bias conditions allowed a thorough examination of 1/f noise at all the operation regimes. The measured frequency range from 1.5 Hz up to 1.5 KHz. Fig. 1e and 1f confirm the excellent agreement of the drain current model and the experiment for all bias and geometry conditions. The compact model reported in Refs 45-46 was used to fit the experimental data obtained from the investigated solution-gated FETs. The values of the model parameters extracted from the fitting of the experimental data are shown in Table 1. The fundamental parameters which are going to be used in noise equations are the carrier mobility (μ), the residual charge density (ρ0), the top gate capacitance (Ctop), the contact resistance (Rc) and the flat band top gate voltage (VGSO). One parameter set is used for all bias conditions at each channel length; even for different channel lengths, the parameters are quite close to each other. Fig. 2a shows the measured spectra of the L=23 μm devices at VDS=40 mV where it can be observed the 1/f dependence of noise amplitude. LFN can be originated by the local random fluctuations of the carriers' density and of the mobility which correspond to the above described ΔN and Δμ effects, respectively. We develop a physics-based analytical model describing these effects, considering the channel of the device divided into elementary slices 43 . Here, the chemical potential based analytical current model will be used to define the conditions at each channel slice. The fluctuations generating LFN are always small and, consequently, the analysis of the propagation of the noise sources to the voltages or currents at the contact terminals reduces to linear analysis. Therefore, the principle of superposition can be used for adding the effects of the local noise sources along the channel 43 . These local fluctuations can be modeled by adding a random local current noise source δIn with a PSD SδI 2 n as shown in Fig. 2b. The local fluctuations propagate to the terminals resulting in fluctuations of the voltages and currents around the DC operating point. The local noise sources are assumed to be spatially uncorrelated and, therefore, their PSDs can be summed. For detailed explanation of the general methodology, see Supplementary Info A. The model considers a non-homogeneous charge distribution along the device channel, according to the physics of GFET, making this approach more realistic. Fig. 2c illustrates, in left y-axis, the chemical potential Vcs,d at source and drain terminal respectively, calculated by the employed current model [45][46] , vs. top gate voltage overdrive at the lower and higher drain voltage values used in the experiments (VDS=20, 60 mV). As predicted by the model, Vcd approaches Vcs for low Vds values. This effect can be justified from the larger charge homogeneity in the channel at low drain voltage; under these bias conditions Vc is approximately the same at every position in the graphene channel. At VDS=60 mV, the channel charge non-homogeneity increases with respect to a VDS=20 mV and as a result, Vcd differs more significantly from Vcs especially around CNP (see Fig. 2c). At high gate voltages the difference between Vcd and Vcs becomes less important even for the higher drain voltages, which indicates that the non-homogeneity of the channel is more pronounced near CNP. In the right y-axis of Fig. 2c, the relative fluctuation of Qgr(x) from source terminal to the middle of the channel, |Qgr(0)-Qgr(L/2)|/Qgr(L/2) (%), is shown vs. top gate voltage overdrive for the same drain voltages (VDS=20,60 mV). The homogeneity of the channel for the small VDS away from VCNP is clear since the observed relative fluctuation of Qgr(x) is insignificant (~1%). As we approach CNP, this fluctuation increases since the channel starts to become non-homogeneous even for this small VDS. At abs(VGS-VCNP)≈0.1 V, the relative fluctuation of Qgr(x) reaches its maximum value (~6%) and then it starts to decrease leading to an M-shape behavior similar to that observed in LFN data. This can be justified in terms of the residual charge (e•ρ0=8•10 -8 C•cm -2 ) which starts to contribute to Qgr(x) at this operating point. At VCNP, ρ0 is dominant at almost every position of the channel and this leads to the minimum of the relative fluctuation of Qgr(x) observed for the low VDS value (~1%). For the higher VDS, an M-shape is also observed for the relative fluctuation of Qgr(x) from source terminal to the middle of the channel but the more intense non-homogeneity leads to higher values. More specifically, the maximum values of the relative fluctuation at abs(VGS-VCNP)≈0.1 V are almost ~20%. At VCNP, the effect of ρ0 decreases the relative fluctuation at a minimum value of ~4% which is significantly higher than the minimum observed at CNP for the lower VDS. This also occurs because of the inhomogeneity of the channel at the higher VDS.
For detailed explanation of the behaviour and value of Qgr(x) at every channel position x under different bias conditions, see Supplementary Info B ( Figure S1). Considering the carrier number fluctuation effect, if a certain number of carriers is trapped at channel position x, the relative current fluctuation can be calculated as: where Ngr is the graphene carrier density and Qt, Nt are the trapped charge and density respectively; charges and number of carriers are expressed per unit area since they are referred to a channel slice. Fluctuations of the trapped charge δQt can cause a variation in the chemical potential δVc which can lead to a change of charges that depend directly on the chemical potential such as the graphene charge, the top gate and the back gate charge. By applying charge conservation law and by considering a linear dependence of the quantum capacitance Cq and the chemical potential Vc (Cq=k•|Vc|) [45][46] , with k defined in Supplementary Info A, the following expression is derived: and the PSD of the local noise source normalized by squared drain current can then be calculated as (see Supplementary Info A): , where NT is the dielectric volumetric trap density per unit energy (in eV -1 cm -3 ) which is used as a fitting parameter, K is the Boltzmann constant, T is the absolute temperature, e the electron charge, λ~0.1 nm is the tunneling attenuation distance since the trapping/detrapping mechanism is considered a tunneling process. The analysis of this process is difficult at atom level, thus the best possible approach is to model the capture cross-section according to ( ) = exp (− / ), where is the tunnelling probability of a carrier to get captured by a trap located at a barrier depth into the dielectric. Cback is not defined for the measured devices in this work but is included in the equations for better generalizability of the proposed model. By integrating the PSD of the local noise source in the entire channel length 41 and by changing the integration variable from length to chemical potential at source and drain terminals [45][46] , it is possible to derive the following analytical formula for the relative PSD of the total fluctuation of the drain current resulting from a carrier density fluctuation ΔΝ: is defined by Equation (5), where α=2·ρ0·e. Finally, g(Vc) is a bias dependent term proportional to the drain current [45][46] (see also Supplementary Info A). As far as the mobility fluctuation effect is concerned, by using a methodology identical to the presented above, the following analytical formula is obtained: (see Supplementary Info A). The bias dependent term KD/Δμ is given by Equation (7) where residual charge related term α does not play any role and SD/Δμ=2·αH·e/(C·WL·k) where αH is the unitless Hooge parameter which is used as a fitting parameter. In order to calculate the total 1/f noise of the device, the two different contributions have to be added as: The strong dependence of 1/f noise on both residual charge and channel charge inhomogeneity makes it essential to thoroughly investigate these phenomena. Fig.3a illustrates the dependence of the two 1/f noise models, ΔΝ and Δμ, on the residual charge and Fig. 3b on the drain voltage. In Fig. 3a the contributions of both noise mechanisms ΔΝ and Δμ are shown for different values of the residual charge density ρ0 at VDS=20 mV. The value (4,6•10 11 cm -2 ) corresponds to the value experimentally extracted from fitting the I-V data (see Fig. 1e and 1f). In addition, the model is tested at three other lower values of ρ0 (3·10 11 , 4,6·10 10 , o cm -2 ). It can be concluded from Fig. 3a that the ΔΝ effect is responsible for the M-shape bias dependence in case of relatively high ρ0 values are considered (see Fig. 2c) while for low ρ0 values, a Λ shape behavior is obtained. Δμ model always provides an Λ shape behavior with an increased maximum at CNP as ρ0 decreases since ρ0 only affects normalized drain current term g(Vc) in Equation 6 and not the bias dependent term KD/Δμ of Equation (7). (For more information, see Supplementary Info C). Regardingthe drain voltage dependence, Fig. 3b indicates that the increase of VDS (20, 60 mV) increases the contribution of the ΔΝ noise near the CNP resulting from the increased graphene charge inhomogeneity observed at higher VDS (see Fig. 2c Fig. 3c, the local noise at each channel position x is shown at VGS=VCNP and at VGS-VCNP=0,5 V for both noise mechanisms ΔΝ and Δμ, as it is calculated by Equations (3) and (A12) respectively for VDS=20, 60 mV. At VCNP, the total noise ΔΝ propagated to the terminals is mainly determined by the local noise at the source/drain ends while away from CNP, all the points along the channel contributes equally. This proves the homogeneity of the channel at higher gate voltages while the different contributions of the charge distributed along the channel at VCNP indicate the channel inhomogeneity close to CNP, especially for the higher VDS, as described in Fig. 2c. Regarding Δμ noise, all the points of the channel contribute similarly at every bias condition. By summing the local ΔΝ and Δμ noise sources throughout the channel, we can accurately obtain the values of the total ΔΝ and Δμ noise PSD as calculated by Equations (4) and (6) and as shown in Fig. 3b for the operating conditions under study. The effect of ρ0 in the local LFN is shown in Supplementary Info C. Fig. 4 shows the experimental noise data averaged in the bandwidth of 10 -40 Hz, referred to 1 Hz. The data are fitted using the same parameters extracted from the current compact model and adjusting only the NT and αH values. Fig. 4a and 4b present the normalized noise data for transistors with two different channel lengths, L=43 μm and L=5.5 μm, respectively, at two drain voltage values (20 and 60 mV). Fig. 4c shows the fitted normalized noise data for two other channel lengths (23 and 8 μm) at all the drain voltage values (20, 40, 60 mV) (see Fig. S3 in Supplementary Info D for the complete set of data). The symbols correspond to the experimental data and the solid lines represent the total 1/f noise model. The well-known M-shape trend is observed in our data near the CNP. The change in the minimum value at the CNP with VDS caused by the charge inhomogeneity is also properly described. Away from the CNP, the measured noise is independent on the drain voltage and the model follows this trend as well. Dashed lines representing the different 1/f noise contributors in Fig. 4a and 4b, provide additional insights on the contributions of the different noise mechanisms. The dotted lines in Figure 4a present the simplified (gm/ID) 2 model [16][17] (See Supplementary Info E, Figure S4) for both drain voltages available. It is apparent that the specific approach cannot capture the drain voltage dependence of LFN near CNP since it considers a uniform charge along the channel. The ΔN mechanism is responsible for the M-shape, as it was shown previously in Fig. 3a. Despite the fact that the ΔN model can predict the drain voltage dependence near CNP, it significantly underestimates the minimum of noise near the CNP. On the other hand, the Δμ model predicts a Λ-shape dependence with the gate bias which is independent on the drain voltage. This term can have a significant effect near CNP, setting a minimum noise value that helps to fit better the experimental data (see Fig. 4a and 4b). The distinction of the ΔΝ and Δμ contributions near the CNP is shown in this work for the first time.
The normalized noise increases with decreasing device area, as it is apparent in Figure 4c; this is expected since 1/f noise is known to scale inversely proportional with the device dimensions. As it can be derived from Equations (4) and (6). The higher noise measured in the n-type conduction regime, more pronounced at higher gate voltages and at shorter channel lengths, is tentatively attributed to the bias dependent contact resistance experimentally observed in this bias regime 24 . Fig. 4d shows the model corrected to include a contact noise contribution 24 as reported previously. To calculate the magnitude of this contribution, the contact resistance has been calculated using a transmission line method (TLM) analysis. The contact noise model used to refine the fitting of the experimental noise also proves that contact noise is negligible near the CNP. All the extracted 1/f noise parameters are shown in Table 1; it is important to highlight that for a fixed channel length, the same parameters are used to fit the whole range of bias conditions. Regarding the level of parameters are in the same order of magnitude or lower than what is available in bibliography for graphene devices. The αH parameter is lower than many reports 28,30,37 even considering that the Hooge model underestimates 1/f noise, since the ΔN effect is more dominant as shown in Fig. 4. In some reports 4, 42 , the NT parameter is also derived and it is quite comparable with the values in Table 1; still, NT is higher than its typical range at Si devices (NT~10 16 -10 18 eV -1 cm -3 ) 19,43 . The noise amplitude B=f•Area•SID/ID 2 , can be easily found to range from 10 -7 ~ 10 -6 μm 2 in the present work (See Figure S5 in Supplementary Info F), which is similar or lower in comparison with other works 4, 28-29, 33, 37-38 . In order to confirm the generalizability of the proposed model, we have tested it with datasets of three solid gated GFETs taken from literature 30,[32][33] . Fig. 5a (Fig. 3b 33 , T=1.6 K) at VDS~0.6 mV. The two different representations of normalized noise displayed in Fig. 5 (SID/ID 2 and SVD/VD 2 ) are equivalent. The symbols represent the measurements and the total model is shown by the solid lines, the ΔN and Δμ contributions are also shown with dashed and dotted lines respectively. Regarding Fig. 5a where the M-shape dependence of noise is also observed, the total model behavior is acceptable. Additionally, both ΔN and Δμ effects have a significant contribution especially near CNP, similarly as in Fig. 4. In Fig. 5b, the M-shape dependence of noise is intense probably due to a higher residual charge value and our model captures well this shape. ΔΝ effect is the dominant noise source while Δμ effect has a small contribution near CNP. The LFN data in Fig. 5b are asymmetrical with an increased value at p-type region while our model is equivalent in both n-and p-regions. We extracted the noise parameters by targeting a better performance in n-type conduction but we could achieve an overall better fitting by using different LFN parameters below and above CNP. Finally, Fig. 5c shows that the 1/f normalized noise follows a Λ -shape behavior. By fitting the noise curve with our model, it is possible to distinguish between the ΔN and the Δμ effects due to the different slopes of their curves. This finding can be explained by the relatively small value of the residual charge ρ0=1,2·10 11 cm -2 in this device. The parameters extracted are also presented in the last three columns of Table 1. For all devices, the NT parameter is a little higher than the ones extracted for our dataset. Regarding the αH parameter, it is in the same level as in our data set for the plot in Fig. 5a while it is quite lower in the Fig. 5b but in this case the error of the fitting can be quite significant.

Conclusions
In conclusion, this paper investigates the bias-dependence of 1/f noise in liquid gated, single layer GFETs. An analytical compact

a) b) c)
model is developed considering both carrier number and mobility fluctuation mechanisms. According to this procedure, the noise in an elementary slice of the channel is calculated based on physical laws; after integrating along the channel, the local noise sources are propagated to the terminals and the final formulas are derived. In this compact format the model can be easily implemented in Verilog-A code and integrated in circuit simulators, which could be instrumental to bridge the gap between device and circuit levels. The model is capable of quantitatively capture the experimental M-shape of normalized output noise which is observed for all channel lengths and drain voltages available. The simultaneous contribution of the ΔN and Δμ noise mechanisms significantly improves the prediction accuracy of the model, confirming that both noise contributions are needed to properly model noise in graphene FETs. Additionally, a previously reported contact noise term based on carrier number fluctuations proved to be effective to account for such contribution. An analytical solution of the LFN generated by contact resistance is an essential future step so as our model to be capable of capturing additional behaviours of LFN mentioned in bibliography such as an extended V-shape vs gate voltage and thus, to be considered complete. The analytical model presented in this work encompasses all the main contributions to 1/f noise in graphene FETs, taking into account the non-homogeneities in the channel. Such an analytical and yet complete model can be of high interest to identify and understand the main causes of noise as well as for boosting the design of integrated circuits based on graphene.

Graphene CVD growth and transfer
Graphene is synthesized by chemical vapour deposition (CVD) technique on a copper foil. A chemical wet transfer method is used to transfer the graphene from the Cu foil to the SiO2 substrate. First, the graphene is protected with a sacrificial poly (methyl meth-acrylate) PMMA layer. Subsequently, the back side graphene is removed by oxygen plasma treatment. The Cu foil is then placed in FeCl3 0.5 M/ HCl 2 M (1:2) etchant solution until all the Cu is chemically dissolved. Before the final transfer onto the desired SiO2 substrate, the graphene/PMMA stack is placed several times in DI water to rinse the residual etchant solution away. The wafer is dried for 30 minutes at 40 ºC on a hot plate and then gradually increased up to 180 ºC in a vacuum oven. Finally, the PMMA is removed in acetone and IPA.

Devices fabrication
Arrays of graphene transistors are fabricated on 4-inch Si/ SiO2 wafer with a 285 nm thick layer of thermal silicon oxide. A first metal layer of Ti/Au is deposited by electron-beam evaporation and structured by a lift-off process. Afterwards, the CVD-gown graphene is transferred as previously described. The graphene transistor active area is protected by a photo definable resist HIPR 6512. Thus, graphene is patterned by oxygen plasma in a reactive ion etching (RIE) system. Top contacts of Ni/Au are deposited by evaporation and defined by lift-off. In order to prevent any damage of graphene, the lift-off is performed by leaving the wafer 1 hour in acetone and flushing it with a syringe. After 2 hours annealing step at 300 ºC in ultra-high vacuum, a 2 μm thick SU8 negative epoxy resist (SU-8 2005 MicroChem) layer is spin coated and structured such that only the graphene between source and drain contact is exposed to the electrolyte.

Electrical characterization
The liquid-gated graphene-transistor characteristics are measured in a 10 mM PBS electrolyte. The gate voltage is applied versus an Ag/AgCl reference electrode. At each polarization, the drain-to-source current signal is measured with a custom-made current-to-voltage converter with two parallel inputs for DC (lowpass filter at 0. 1Hz for I-V characteristics) and AC (band-pass filter from 0.1 Hz to 7 kHz for noise characterization). The data acquisition is performed using a National Instruments DAQ-card system (NI 6363). In order to stabilize the IDS current value at each gate bias, the sampling condition is dIDS/dt <1·10 7 A/s before each recorded point. For the noise characterization, the sampling frequency was set to 50 kHz for a period of time of 13 seconds choosing the Welch's method in which 10 segments overlap by 50%.

Data availability
The data that support the findings of this study are available from Ramon Garcia Cortadella and Andrea Bonaccini Calia. Please, address your requests to ramon.garcia@icn2.cat and andrea.bonaccini@icn2.cat.

Carrier Number Fluctuation Effect:
As mentioned in the manuscript, the fluctuation of the trapped charge δQt can cause a variation in the chemical potential δVc which can lead to a change to all charges that depend directly on chemical potential such as the graphene charge, the top gate and the back gate charge. The application of the charge conservation law gives: The PSD of the local noise source is calculated by eqn (4) in the manuscript. Taking the integral of this from Source to Drain in order to calculate the total 1/f noise PSD as in eqn (A3) 15, 43 , we have: In order to express this integral in terms of chemical potential Vc, we have to change the integral variable as [45][46] : Where drain current is given as [45][46] : With k=2·e 3 /(π·h 2 ·v 2 f) 45 The integral in eqn (A11) can be solved analytically and gives the eqns (2,5) in the manuscript.

Mobility Fluctuation Effect:
In the empirical Hooge model, the PSD of the local noise source is expressed as 43 : The integral in eqn (A12) can be solved analytically and gives the eqns (6,7) in the manuscript. Figure S1: Detailed examination of graphene charge along the channel.  plays a role only in g(Vc) factor in eqn (A10). As it can be seen in Fig. 3a of the manuscript, the omission of the residual charge lead to a Λ -shape behavior even for the carrier number fluctuation effect while the less the residual charge, the steeper Λ -shape trend with a higher maximum is observed for both carrier number and mobility fluctuation effects.

B. Supplementary Information
It would be very useful to observe how the absence of the residual charge affects both noise mechanisms ΔΝ and Δμ locally in the transistor channel. Regarding ΔΝ local noise model described by eqn (4) of the manuscript and Δμ local noise model described by eqn (A12), residual charge has an effect only in Qgr as this is defined in eqn (A6). As it can be seen in Fig. S2, residual charge does not affect local noise at higher gate voltages for both noise mechanisms as it was expected (see Fig. 3a  Qgr, the effect on local noise mechanisms is important. Fig. S2a shows the increase of ΔΝ local noise when ρ0 is ignored leading to the Λ-shape of Fig. 3a of the manuscript. Similarly Fig. S2b shows the increase of Δμ local noise when ρ0 is ignored.

E. Supplementary Information: Derivation of an (gm/ID) 2 related LFN model with and without correlated mobility fluctuations
A very common approximation for modeling LFN in Si MOSFETs relates the output noise divided by squared drain current SID/ID 2 , with the squared transconductance to current ratio (gm/ID) 2 15-16 . Despite the fact that this model is widely used in circuit simulators, is valid only under uniform channel conditions. This method has also been applied in Graphene FETs 4 and has been found to underestimate LFN at CNP where the channel is non-uniform even for a small VDS as shown in Figure 2c of the main manuscript. In this section we will follow a similar approach as in From Drift-Diffusion theory [43][44][45] , we can assume that: From eqns (A20, A22) and since dID/dVGS=gm we conclude: where αc is the Coulomb scattering coefficient in V.s/C and μ is the mobility of the device. Figure S4 below presents the behavior of this simple approach described above with (eqn A25) and without (eqn A24) the effect of correlated mobility fluctuations for the shortest device with L=5.5 μm at VDS=20 mV and VDS=60 mV.  gate voltages. Even if we assume that with an appropriate combination of αc and αH parameters we could achieve a better fitting, still the model would be independent of VDS due to the homogeneous channel consideration. Figure S4b presents the results of Figure 4a versus drain current ID in log scale. Since ID is symmetrical below (p-type) and above (n-type) CNP as it is shown in Figure 1c of the main manuscript, the two regions should be shown separately in log-scale. In an illustration similar to Figure S4b for Si MOSFETs, SID/ID 2 LFN is maximum and constant in weak inversion region and decreases as we get deeper in strong inversion (See Figure 6 of Reference 17). Regarding weak inversion regime, this occurs because gm/ID term is maximum and constant in the specific region and thus, eqn (A24) becomes equivalent to eqn (A25) since αc is negligible. Consequently, NT parameter which is included in SVfb term is extracted. As the drain current gets higher, LFN decreases and αc parameter is extracted from this higher current regime. This is not the case in GFET though as it can be seen from Figure S4b since (gm/ID) 2 is not constant in lower current regime. Figure S5: