This is the accepted version of the following article: Ahopelto J., Ardila G., Baldi L., Balestra F., Belot D., Fagas G., De Gendt S., Demarchi D., Fernandez-Bolaños M., Holden D., Ionescu A.M., Meneghesso G., Mocuta A., Pfeffer M., Popp R.M., Sangiorgi E., Sotomayor Torres C.M.. NanoElectronics roadmap for Europe: From nanodevices and innovative materials to system integration. Solid-State Electronics, (2019). 155. : 7 - . 10.1016/j.sse.2019.03.014, which has been published in final form at https://dx.doi.org/10.1016/j.sse.2019.03.014 © https://dx.doi.org/10.1016/j.sse.2019.03.014. This manuscript version is made available under the CC-BY-NC-ND 4.0 license http://creativecommons.org/licenses/by-nc-nd/4.0/ Accepted Manuscript NanoElectronics Roadmap for Europe:From Nanodevices and Innovative Ma- terials to System Integration J. Ahopelto, G. Ardila, L. Baldi, F. Balestra, D. Belot, G. Fagas, S. De Gendt, D. Demarchi, M. Fernandez-Bolaños, D. Holden, A.M. Ionescu, G. Meneghesso, A. Mocuta, M. Pfeffer, R.M. Popp, E. Sangiorgi, C.M. Sotomayor Torres PII: S0038-1101(18)30664-6 DOI: https://doi.org/10.1016/j.sse.2019.03.014 Reference: SSE 7546 To appear in: Solid-State Electronics Received Date: 7 November 2018 Revised Date: 12 January 2019 Accepted Date: 2 March 2019 Please cite this article as: Ahopelto, J., Ardila, G., Baldi, L., Balestra, F., Belot, D., Fagas, G., De Gendt, S., Demarchi, D., Fernandez-Bolaños, M., Holden, D., Ionescu, A.M., Meneghesso, G., Mocuta, A., Pfeffer, M., Popp, R.M., Sangiorgi, E., Torres, C.M.S., NanoElectronics Roadmap for Europe:From Nanodevices and Innovative Materials to System Integration, Solid-State Electronics (2019), doi: https://doi.org/10.1016/j.sse.2019.03.014 This is a PDF file of an unedited manuscript that has been accepted for publication. As a service to our customers we are providing this early version of the manuscript. The manuscript will undergo copyediting, typesetting, and review of the resulting proof before it is published in its final form. Please note that during the production process errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain. NanoElectronics Roadmap for Europe: From Nanodevices and Innovative Materials to System Integration J. Ahopelto, VTT Technical Research Centre of Finland D. Holden, CEA-Leti, Grenoble, France, Ltd, Espoo, Finland, Jouni.Ahopelto@vtt.fi david.holden@cea.fr G. Ardila, U. Grenoble Alpes, CNRS, Grenoble INP, IMEP- A.M. Ionescu, EPFL, Lausanne, Switzerland, LaHC, Grenoble, France, ardilarg@minatec.inpg.fr adrian.ionescu@epfl.ch L. Baldi, Consultant, Milano, Italy, baldi.livio@gmail.com, G. Meneghesso, University of Padova and IUNET, Padova, F. Balestra, U. Grenoble Alpes, CNRS, Grenoble INP, IMEP- Italy, gauss@dei.unipd.it LaHC, Grenoble, France, balestraf@minatec.inpg.fr, A. Mocuta, IMEC, Leuven, Belgium, an- D. Belot, CEA-Leti, Grenoble, France, didier.belot@cea.fr da.mocuta@imec.be G. Fagas, Tyndall, Cork, Ireland, georgios.fagas@tyndall.ie M. Pfeffer, Fraunhofer IISB, Erlangen, Germany, S. De Gendt, IMEC, Leuven, Belgium, markus.pfeffer@iisb.fraunhofer.de Stefan.DeGendt@imec.be R. M. Popp, edacentrum GmbH, Hannover, Germany, D. Demarchi, Politecnico di Torino and IUNET, Torino, popp@edacentrum.de Italy, danilo.demarchi@polito.it E. Sangiorgi, University of Bologna and IUNET, Bologna, M. Fernandez-Bolaños, Lausanne, Switzerland, Italy, enrico.sangiorgi@unibo.it montserrat.fernandez-bolanos@epfl.ch C. M. Sotomayor Torres, ICN2 and ICREA, Barcelona, Spain, clivia.sotomayor@icn2.cat Abstract—The NEREID project (“NanoElectronics Roadmap for to follow Moore’s Law, with a constant reduction in device Europe: Identification and Dissemination”) is dedicated to map- costs and an exponential growth of the semiconductor market. ping the future of European Nanoelectronics. NEREID’s objec- The main role of ITRS has been in providing research guidance tive is to develop a medium and long term roadmap for the for the many actors of the semiconductor ecosystem, in syn- European nanoelectronics industry, starting from the needs of chronizing the technology development and the timely avail- applications to address societal challenges and leveraging the ability of manufacturing equipment and methods and in provid- strengths of the European eco-system. The roadmap will also ing focus on critical bottlenecks. identify promising novel nanoelectronic technologies, based on the advanced concepts developed by Research Centres and Uni- However, the “technology push” that has been at the base versities, as well as identification of potential bottlenecks along of ITRS has shown in recent years its limits: device size and the innovation (value) chain. Industry applications include En- speed are no longer the only parameters of importance, and ergy, Automotive, Medical/Life Science, Security, loT, Mobile system-driven technologies have been considered by the new Convergence and Digital Manufacturing. The NEREID roadmap IRDS Roadmap (International Roadmap for Devices and Sys- covers Advanced Logic and Connectivity, Functional Diversifica- tems), focusing on computing systems. tion (Smart Sensors, Smart Energy and Energy for Autonomous Systems), Beyond-CMOS, Heterogeneous Integration and System On the other hand, the integration of new functionalities, Design as well as Equipment, Materials and Manufacturing Sci- required by new applications, needs the incorporation of spe- ence. This article gives an overview of the roadmap’s structure cial metrics for technologies that do not necessarily scale ac- and content. cording to "Moore's Law“, expanding the focus from chips to different kinds of systems. This trend is especially relevant for Keywords: Nanoelectronics, Roadmap, Beyond CMOS, More the European semiconductor industry that has focused on seg- Moore, More than Moore, Design-technology gap, Heterogeneous ments of greater relevance for the European industry applica- integration, System design, Novel materials, Equipments and tions, like Automotive, Industrial and Medical. Therefore, an manufacturing. appropriate kind of roadmap is needed for Europe which fo- cuses on nanoelectronics with respect to the European abilities I. INTRODUCTION and strengths. Roadmaps are highly beneficial for all high tech sectors, The NEREID roadmap for European Nanoelectronics cov- like Nanoelectronics, to improve links between academic and ers both application and technology sectors. This comprises industrial research, to drive investments, to provide inputs for applications in the field of Energy, Automotive, Medical/Life future research programmes and to coordinate efforts to over- Science, Security, loT, Mobile Convergence and Digital Manu- come the main technology challenges. facturing as well as technologies like Advanced Logic and For more than 20 years, the International Technology Connectivity, Functional Diversification (Smart Sensors, Smart Roadmap for Semiconductors (ITRS) has guided the industry Energy and Energy for Autonomous Systems), Beyond-CMOS, Heterogeneous Integration and System Design and Equipment, II. STRUCTURE OF THE NEREID ROADMAP Materials and Manufacturing Science. The NEREID roadmap is structured by the following tech- With its mid/long term focus, the NEREID Roadmap is nology sectors, which are covered in different sub-sections in complementary to the European ECSEL ECS Strategic Re- this article: search Agenda, which is focusing on shorter term horizons. • Advanced Logic/Memories and Connectivity Nevertheless, NEREID has also developed collaboration with, and is in part complementary to, the new International Road- • Functional Diversification (Smart Sensors, Smart Energy map for Devices and Systems (IRDS) in the Europe-led More and Energy for Autonomous Systems) than Moore domain (e.g. Smart Sensors, Energy, Energy Har- • System Design and Heterogeneous Integration vesting) leading to beyond-computing systems (s. Figure 1. ). • Equipment and Manufacturing Science • Beyond-CMOS (Emerging devices and Computing Para- digms) A. Advanced Logic and Memories The historical trend in micro-/nanoelectronics over the last 40 years has been to increase both speed and density by scaling down the size of electronic devices, together with reduced en- ergy dissipation per binary transition, and to develop many novel functionalities for future electronic systems. We are fac- ing today dramatic challenges for More Moore and More than Moore applications: substantial increase of energy consump- tion and heating which can jeopardize future IC integration and performance, reduced performance due to limitation in tradi- Figure 1. NEREID Roadmap Objective tional high conductivity metal/low k dielectric interconnects, The important assets of NEREID are the following: limit of optical lithography, heterogeneous integration of new functionalities for future Nano systems, etc. • the projection of the evolution of many Figures of Merit (FoMs) vs time for covering the most promising tech- Therefore, many breakthroughs, disruptive technologies, nologies including novel functionalities novel materials, and innovative devices are needed in the next two decades. [1] [2] • the understanding of the dependencies between short/ medium term (e.g. More Moore and More than Moore) In the More Moore domain there is strong interest in and long/very long term (e.g. Beyond CMOS) activities Europe for specific activities dealing with very low power sys- tems, leading to possible disruptive applications for instance • the strong interaction between application and technol- for future IoT systems, or for application driven performance, ogy experts, coming from leading research players in e.g. high temperature operation for the automotive industry, industry and academia, especially with the organization and also for embedded memories. of many Workshops. We have chosen some core technologies that we think are • the combination of a top-down approach, which is ap- the most promising for many future applications in order to plication driven, and a bottom-up one, based on planned overcome the number of challenges we are facing for future technology evolution to prompt new ideas for disruptive ICs, in particular: products and applications (s. Figure 2. ). • High performance • Low/very low static and dynamic power consumption • Device scaling • Low variability • Affordable cost Considering these challenges, the following nanodevices and technologies have been considered as very relevant for fu- ture Nanoscale FETs: • FD (Fully Depleted) SOI (Silicon-On-Insulator) MOSFET: for low power applications and low variability • FinFET (or Trigate FET): for high performance and/or low power applications Figure 2. NEREID Roadmap Approach • Nanowire FET: for high performance and low power appli- (MoS2 in the figure). However, at the end of the next decade, cations and ultimate integration sub-60mV/decade swing will be needed, which can only be ob- tained with small slope switches (Tunnel FET with III-V or 2D • CNTFET/Carbon NanoTube FET: for very fast and possi- channels in the figure, or NCFET, or hybrid devices) using bly ultimately scaled transistors for logic applications, with boosters developed for CMOS (alternative channel materials, self-assembly based fabrication high k dielectrics, multi-gates, thin layers, heterostructures, • NCFET/Negative Capacitance FET: for very low power etc.). applications using steep subthreshold slope B. Connectivity • Non-charge-based Resistive Memories or alternative charge-based Memories: to replace charge-based memories The connectivity functions are everywhere to make the link using PCRAM (Phase Change RAM), RRAM (Resistive between all other electronic functions. From the sensors and RAM using a nanofilament), MRAM (Magnetic RAM, es- actuators to the processors and microcontrollers, from the sen- pecially STT/Spin Transfer Torque MRAM), or FeRAM or sor nodes to the gateways, from the gateways to the cells from FeFET (using the polarization of a ferroelectric material) the cells to the data centres, and all over the world. Inside each of these units, the connectivity links the processors to the • Sequential 3D integration: for increasing device integration memories, the core of multicores in High performance comput- (transistors, memories, sensors, etc.) and performance using ing applications, and the peripheral devices to the central com- 3D stacking puting units. The roadmap also covers the future modelling and charac- They are differentiated depending on the range and the na- terization tools needed for developing these future devices and ture. The nature is either wireless (in radio frequency mmW, technologies. THz bands, or visible light), or wireline (in copper or optical A major challenge we are facing is the energy consumption fibre). The range of such functions can be sorted according to of future devices and systems. Figure 3 presents the compari- the distance; the ultra-short range in the µm to cm distance, the son of the subthreshold swing obtained by numerical simula- short range is under 100m, while the long-range covers dis- tion, a fundamental parameter for low power operation, for the tances over 100m. most advanced nanoscale FET architectures and the most The most important connectivity market is dedicated to data promising materials of the literature as a function of the gate communications, especially for cellular (WAN), WLAN, length and/or time horizons. WPAN, NFC, and incoming WSN and IoT communications. Next, we can distinguish two other markets, especially in Europe, even if they use, or are be connected to the first one: the automotive market which is on the eve of the autonomous vehicle revolution, and the “health & security” market which will transform drastically our way of life in the next decades. In the data communication field, we can distinguish three main families using the link distance criteria (Fig. 4); outdoor and cellular communications, including 5G and future genera- tions, indoor communications mainly represented today by WiFi links, and finally a less visible one, which can be defined as In Device communication between dies and packages in an equipment. If we look at the expectations on the technologies, the evo- lution is mainly visible in the different functions including Power Amplifiers, Low noise Amplifiers, Antennas in the Wireless field, or Modulator Drivers, Laser Drivers, Trans Im- pedance Amplifiers, Modulators, Laser Diodes, and PIN diodes Figure 3. Advanced simulations of subthreshold swing (mV/decade) vs. gate in the Wireline field, we have to implement for the different length (beyond the IRDS Roadmap) or time horizon for various device architectures (Bulk Si, FinFET, Double Gate, Nanowire with various transceivers. In this domain, the More Than Moore axe is privi- diameters, Carbon NanoTube, MOSFET on Insulator, Nanosheet, Tunnel leged, (actives, NEMs and MEMs, and passive components), FET) and channel materials (Si, InGaAs, InAs, Heterojunction GaSb-InAs, and the multi-physics assembly can bring advantages versus Graded AlGaSb, MoS2, WTe2), compared with IRDS needs for the next 15 present solutions. On the other hand, we can notice that, years; Negative Capacitance FETs are also a possible solution for sub- whichever the transceiver, we have common functions such as 60mV/dec swing but they are not represented in this plot because there isn’t any result for sub-30nm gate length. the Phase Frequency generation and Local Oscillators in the Wireless field, Phase Frequency Lock Loop and Clock Recov- The IRDS needs for logic devices are also shown (vs time ery in the Wireline field. For these functions, the expectations horizons). The best performance of CMOS devices at the end are similar regardless of the selected communication link. In of the Roadmap (swing close to 60mV/dec) is obtained for this domain, the More Than Moore axe is also privileged, (ac- Multi-gate Nanowire FET with very small wire diameter (3nm) tives, NEMs and MEMs, and passive components). As previ- and Double Gate MOSFET with 2D/TMD channel material ously, the multi-physics assembly can bring advantages versus existing solutions. Concerning the signal modulations and de- 1) Automotive Sensors modulations, the difference is mostly done through design, the European leadership in automotive is expected to be rein- functions are done in an analog approach or a digital one. Then, forced in the future thanks to major European technology man- depending on the approach, the technology expectations are ufacturers, early commercialization of smart vehicles and pub- different. In an analog approach, the active More Than Moore lic organizations supporting the advancement of these vehicles axe is privileged, and, in a digital or “digital like” approach, the [3][4]. The European road transport [5] sector has set as tar- More Moore will bring the cost reduction and the efficiency. gets: (i) a 50% more efficient fleet by 2030, (ii) CO2 emissions How to evaluate the Figure of Merit of a function? – The reduced significantly (by 80% in cars, by 40% in trucks), with industrial value is to evaluate the efficiency of a function ver- new fuels entering the market, and, (iii) mobility to be 50% sus the cost of this function. The cost is very complex to esti- more reliable and (iv) traffic safety improved significantly (by mate, as we don’t have the information, it could be composed reducing road accidents by around 60%). Car-makers will have of the fabrication cost (initial cost), depending on the technol- to re-think their business; probably considering to go in the di- ogy cost, the packaging cost, the test cost, and the exploitation rection of “mobility-as-a-service” with providers offering elec- cost. trical vehicles, car sharing, etc. NEREID’s automotive sensors roadmap has been structured in three layers, with benchmark- The proposed formula for the technical efficiency FoM is ing at various time horizons: the following: (I) Sensors for car system performance, navigation, inertial FoM = Data_rate (Gbs, Mbs, Kbs) × ??istance (??, km); and motion sensors; In addition, depending on the specificities, power consump- (II) Advance Driver Assistance System (ADAS) sensory sys- tion and bit error rate (BER) can be added as challenges. tems: Radars (for short and long range), Lidar, image, in- frared and ultrasonic sensors: (III) Sensors for environmental monitoring, including tempera- ture, rain, humidity, gas and particles. It is worth noting that there is increased interest in the automo- tive industry to further extend the monitoring capability from the car to the driver’s health, alertness and fatigue. This is cer- tainly a very interesting direction involving specific sensor technologies, some creating new interactions with the health- care sensor roadmap but not limited to. In the current version of the NEREID roadmap this aspect is not directly addressed but is under consideration for the final version of the roadmap. Figure 4. Connectivity Challenges in the next five years C. Smart Sensors Technology is moving from basic sensing to smart sensing in nearly every domain of applications. A smart sensor is a sensing system that combines the sensing element with local analog and digital signal processing, energy management (and possibly, energy harvesting) and wireless connectivity. Moreo- ver, it can include multiple transducers for multi-parametric sensing. The information provided by smart sensors allows for efficient use of resources, higher productivity and better deci- sion making. As smart sensing continues to evolve, intelligent Figure 5. Automotive sensors roadmap,with its main subcategories and autonomous activities will become possible, such as automated priority keywords, as structured by NEREID. driving and automated logistics. In order to anticipate these evolutions, future sensor developments with their needed fig- There are some particular features that automotive smart ures of merit are addressed in NEREID in sensors roadmaps. sensors of any kind (including MEMS and solid-state sensors) The exercise of performing a European smart sensor roadmap share and make their development very challenging: is broad, complex and diverse because sensing technologies are not driven just by scaling and costs, as was the case of CMOS. • All sensor figures of merit are guided by safety regulations; NEREID decided to focus on two families of smart sensors that • Data safety and privacy, extendable to big data; are highly relevant for European scientific and industrial lead- ership, economy and society: automotive sensors (Fig. 5), and, • Transferability to all vehicle types; medical and healthcare sensors (Fig. 6). • Robustness in all weather conditions; • Stability in large temperature ranges • Redundancy; • Long life-time, low power and low cost; • Miniaturization • High quality standards and performance optimization. Finally, it is worth noting that challenges from the automo- tive markets cover both sensor technology and their packaging, in a larger eco-system dealing with multi-domain co-design (chip, package, system) and with a high importance given to reliability. 2) Medical and Healthcare Sensors Figure 6. Medical and Healtcare sensors rodmap, with its main subcategories and priority keywords, as structured by NEREID. The domain of smart health is of critical importance for the future of Europe because it addresses aspects of sustainability and Quality of Life in the ageing society. Recent research D. Smart Energy trends in IoT-based health go beyond the base-technology and Power devices based on wide bandgap semiconductors include network architectures and platforms, new services and (WBS) like GaN, SiC, Ga2O3, are poised to play an important applications, interoperability, and security aspects [6]. Any role in future power electronics systems in addition to Si based paradigm shift in healthcare from traditional reactive, interven- workhorse technologies like IGBTs, Superjunction MOSFETs tion-based to proactive, personalized and preventive healthcare (e.g. CoolMOS) and low/medium voltage MOSFETs (e.g. Op- [7] requires the development of a future sensory platform to tiMOS) and smart power BCD devices. WBS have a high serve the generation of medical big data of every patient to be breakdown strength and, in the case of GaN, allows for fabrica- combined with omics and imaging data. NEREID road map- tion of high electron mobility lateral transistors, for which the ping in this field identified three main categories of smart sen- electron mobility is not degraded as would be the case for tradi- sor technologies (Fig. 6) that need particular attention: tional silicon MOSFETs. Together, these facts allow the fabri- (I) Wearable sensors – including all types of vital signs sen- cation of devices, which have orders of magnitude better trade- sors, neurological sensing interfaces, sensors for smarter off between the specific on-resistance and the breakdown volt- therapeutics (to better manage pain and rehabilitation) and age. The roadmap for devices has been set up along four tracks, sensor to address the metabolic diseases (such as glucose the first considers the Si-based power technologies (Super- sensors for diabetes). Wearable sensors [8] should be non- Junction devices, IGBTs and Smart Power BCD). The second invasive, have local signal processing capability and wire- considers the GaN based devices starting from materials to- less connectivity and large autonomy (days to months); wards integration. The third track is related to the evolution of SiC (again from materials to applications). Finally, future mate- (II) Implantable sensors - Bionics or biomedical implants are rial systems (AlN, Diamond, Ga2O3) are considered which artificial addition to the body, to address a certain loss of could offer benefits over the actual WBS in certain domains. function. Implantable sensors are today a reality and will be even more prevalent in the future in the fields of: vi- 1) Si based power devices sion (e.g. bionic eye), hearing (e.g. cochlear or auditory a) Super-junction (SJ) devices. brainstem implants), orthopedic (e.g. electrical bone Silicon based power devices are rather mature from the growth stimulators), cardiac (e.g. pacemaker, artificial semiconductor technology point of view. This maturity com- heart or heart valves, ventricular assist device), neu- bined with the low area-specific resistance unit cost of super- ral/brain (e.g. neurostimulators). Specific requirements junction (SJ) technology enables the power-conversion market and challenges include biocompatibility, long life opera- dominance of these devices in various application segments. tion without failure and in-body communications. Further research in this field should improve (or at least pre- (III) Molecular diagnostic and drug development sensors – serve) the market share of European manufacturers in the com- used to detect specific sequences in DNA or RNA, dele- petitive and cost sensitive SJ market. tions, rearrangements, insertions, for analysing biological b) Insulated Gate Bipolar Transistor (IGBT). markers at the molecular level, such as genome and pro- teome. They cover advanced future portable diagnosis of Further development steps on Si-based IGBT technology infectious diseases, cancer, and other diseases/disorders are possible and crucial for future business success although and checking the risk of genetic predisposition for a dis- this technology is mature and approaching its limits. ease. The most notable directions are based on Lab on c) Smart Power BCD Technology Platform. Chip [9] & Organ-on-Chip [10] technological ap- proaches. Thanks to the availability of a wide variety of elementary devices (Bipolar, CMOS, POWER Lateral DMOS and Passive) BCD products are present in almost all the current applications. As for all the technology in the More than Moore arena, the above), and high carrier lifetimes for high voltage devices, e.g. evolution of this platform is driven by the application require- bipolar devices. ments and evolution. 4) Alternative Wide Bandgap Semiconductors 2) GaN-Based Technologies: Besides GaN and SiC, a number of other wide-bandgap ma- GaN semiconductor devices provide a competitive ad- terials exist. The most cited is diamond that is considered to be vantage in terms of thermal performance, efficiency, weight the “ultimate material”. However, technological obstacles (lack and size. GaN is anticipated to be the next generation power of efficient n-type doping, conductive surface channels and dif- semiconductor and thus many companies are indulged in de- ficulties to make ohmic contacts) have for a long time blocked veloping widespread applications of GaN semiconductors. The the demonstration of high performance devices. Unless spec- wide band gap semiconductor technology has matured rapidly tacular progress is made on these issues, no real-world imple- over several years. In fact, Gallium Nitride High Electron Mo- mentations are foreseen and as such, diamond is not included in bility Transistors (GaN HEMTs) have been available as com- the roadmap. Besides SiC (for which a separate part of the mercial off-the-shelf devices since 2005. One of the major re- roadmap is dedicated), we identify two major candidate materi- straints of the GaN semiconductor devices market is the high als: AlN and Ga2O3. production cost of pure GaN as compared to Silicon carbide, which has been, in addition to main-stream Silicon, a dominant E. Energy for Autonomous Systems semiconductor material for high voltage power electronics for a As the communicating systems market is booming, the role decade. Beside costs, breakdown voltage and reliability, the of energy harvesting (EH) will be growing. Indeed, the number two most important Figures of Merit (FoM) are on-resistance of connected devices is planned to increase by a huge factor of (Ron) times area and threshold voltage (of normally off transis- 200, while the number of mobile phones is just planned to in- tors), see Error! Reference source not found.Concerning the crease by a factor 3 over a similar period. Connected devices on-resistance times area, this FOM is focusing to the reduction are going to be used more and more in fields such as health- of the on-resistance (that lower the conversion losses) while care, wearables, home automation, etc. The Internet of Things keeping the device area as small as possible (either to reduce (IoT) market grows considerably leading also to the boom of parasitic capacitances as well as for reducing the chip-size and connected devices, and so highlighting the importance of en- costs). ergy needed to supply them in view of the limitations of current 10 5.0 battery technology. This is important in applications with spe- GaN-on-Si HEMT Lateral 600 V - RonxA 9 GaN-on-Si HEMT Lateral 900 V - RonxA 4.5 cific requirements, where a simple battery would not be suffi- Vth (Threshold Voltage) - V cient, where using power connections increases largely the cost 8 4.0 or complexity (i.e. avionics), or when the number of devices 7 3.5 are so numerous that changing batteries could increase the Ron x A - (mOhm-cm2) Threshold Voltage 6 3.0 maintenance cost. Other examples are in harsh environment were the electronic devices could not be reached easily, or in 5 2.5 biomedical devices. In the roadmap, we are focusing on small 4 2.0 connected devices with low power consumption below a few 3 1.5 mW (or even a few tens of µW). 2 1.0 Various neglected energy sources can be exploited and 1 0.5 converted into electricity: sun or artificial light, heat, RF power (either intentionally transferred), mechanical movements and 0 0.0 2023 2025 2027 2029 2031 2033 vibrations. Moreover, this converted energy should be used and Year transferred wisely to sensors, microcontrollers or other elec- tronic components included in the system. Thus, power man- Figure 7. On resistance and threshold voltage evolution in GaN-based agement circuits and energy storage devices become essential. devices In the roadmap, we have chosen several technologies that 3) SiC-based substrates. we think are the most promising for future autonomous de- Compared to the standard bulk Silicon, SiC has superior vices: properties for application in power electronics, i.e. higher First of all, mechanical EH was covered with three con- breakdown voltage, lower losses as well as the capability for cepts, relying typically on input vibrations, with challenges in high frequency switching and high temperature operation. the compatibility with low frequency vibration sources and the These performance data are related to important material prop- increase of the operational frequency bandwidth: erties, e.g. higher energy bandgap, breakdown electric field, and thermal conductivity. The current maximum SiC wafer size • Electrostatic transduction [11]: where very small devices in production is 150mm. Recently, SiC devices with break- can be fabricated with MEMS technologies (CMOS com- down voltages of 10 kV and higher have been developed for patible) but with challenges in the development of materials MV applications. This voltage rating noticeably surpasses that to keep electrical charges (electrets) over many years. of commercial Si devices, such as 6.5 kV IGBTs. It is highly • Piezoelectric transduction [12]: where devices are easy to recommend focusing on the growth of thick epitaxial layers fabricate and CMOS compatible by using MEMS technolo- with low defect densities, e.g. very high current values (50 A & gies, with challenges in the replacement of some toxic ma- conversion). Energy storage for combination with the EH will terials. require advances in storage capacity per unit footprint and power capability during device interrogation and transmission. • Electromagnetic transduction [13]: where macro-devices Power management circuits are expected to require lower input have been vastly explored (with higher performance com- power (<100nW) and voltage (<10mV) (see Figure 8. ) with pared to the other 2 technologies) but with lower perform- smaller surfaces (5 years) and long term (>10 years) F. System Design and Heterogeneous Integration roadmap of the covered technologies, we expect an increase on Building a roadmap for System Design and Heterogeneous their performance or efficiency (more electrical energy pro- Integration is a tough challenge, because of the variety of ap- duced for a given available energy) (See Figure 8. ). plications involved, demanding very different requirements, For the long term in particular, new materials (polymers, sometimes even contrasting in terms of values, limits and im- triboelectric materials, organic, perovskites…) and nanotech- portance. Several road mapping attempts have been done in the nologies will be used to obtain higher performances but also to past. The first example is the 2007 revision of ITRS [20] where replace toxic/rare materials used today (i.e. Bi2Te3 in thermal some quantitative Figures of Merit (FoM) were given in terms EH and Pb-based materials for piezoelectric conversion, rare of percentage of improvement over standards or targets. In the earth based magnetic materials, e.g. DfES, for electromagnetic following ITRS revisions of 2009 [21] and 2011 [22], quantita- tive FoMs have been replaced by bar charts, related to the f) Functional Safety, Privacy & Security topic’s development status with respect to the time horizon. It is therefore justified to consider a new approach for road • The Implementation Qualities are; mapping System Design and System Level Applications, which o Design Paradigms, the possible design paradigms use- goes beyond the simple inclusion of static numerical tables. ful for serving the functionality needs, evaluated in The NEREID approach is to build a general Top-Down de- terms of figure of merit, reporting the importance of the scription of the requirements [23] (a hierarchical map) that has paradigm in solving the functionality needs; to be met in a Bottom-Up process, with concepts, methods, values and expectations strictly related to the application of o Design Tools, useful for implementing the functionality, reference. The Application is the Driver of the System level also evaluated with a figure of merit; activities, and so road mapping has to start from this basic prin- o Physicalities (i.e. Physical and technological require- ciple and consequently, the functionalities and methodologies ments), i.e. the physical implementation requests in for implementing a system are derived from the application. terms of heterogeneous technologies and processes; System design and heterogeneous integration are core fa- • Criticalities and Needs are specific challenges within the cilitators for overcoming the design challenges due to the ever- Implementation Qualities domain that need to be addressed increasing complexity of embedded systems, which require de- before they become critical bottlenecks for the system level signing System on Chips with integration of digital and analog. application. The first step for building the roadmap is to design a struc- The aforementioned connection of the five elements is per- ture suitable for having a common (and practical) scheme to be formed by mapping each of the five functionalities to related applied and tailored as needed in the different application do- Implementation Qualities from which specific Criticalities and mains of reference. The basic idea is to consider the functional- Needs are derived which results in a roadmap structure, shown ities that are of particular interest in future electronic systems. in Figure 10. . Starting from this consideration, the roadmap structure is built by connecting five different elements of Application-Aware Hardware-Software-Co-Design, as depicted in Figure 9. Figure 10. General structure of the roadmap In practice, different tables were built, each one referred to an application domain under consideration. These tables indi- cate for each Functionality: Figure 9. Application-driven Methodology for the roadmap structure • The importance of the Functionality for the specific Appli- cation (with asterisks, having *** indicating very much im- These five elements comprise a list of Functionalities, three portant, * indicating low importance) and the TRL level ex- kinds of Implementation Qualities (Physicalities, Design Ac- pected/targeted for that Functionality; both measures were tivities and Design Paradigms) and Criticalities and Needs. indicated in two time horizons of more than 5 years (5+) Some definitions are: and more than 10 years (10+); • Functionalities, the reference functions that were identified • The Implementation Qualities, split in three main imple- as the common denominator for System Design and Het- mentation targets: a) Physicalities; b) Design Methods and erogeneous Integration needs in terms of technology or im- Tools and c) Design Paradigms. plementation requests. The identified ones are: • The Figures of Merits of the Implementation Qualities, in a) Energy Autonomy 5+ and 10+ time horizons, are filled in, where possible, with quantitative measures (for example power consump- b) Connectivity tion in nW or time in months/years) and where not possible c) Sensor Integration with a qualitative indication (again with asterisks ***, ** or d) Miniaturisation *); e) Reliability and Life Cycle • The Criticalities and Needs, related to the Implementation are present, with original knowledge, bringing Europe to a Qualities, are also measured in terms of importance in the leading possibility for System Level Applications. 5+ and 10+ time horizons. From the general roadmap structure, considering, as high- G. Equipment and Manufacturing Science lighted, that the Applications are the core and the starting point Processing tools and high-quality materials have been the of the roadmap, the three important application domains Auto- key enabling factors in the evolution of Nanoelectronics, and in mated Driving; Implantable Devices and Environmental Moni- particular in the area of More Moore, where scaling according toring and Wearable Systems have been selected to apply the to Moore's Law was one of the key drivers. The objective on novel model. The rationale of choosing these specific applica- Equipment and Manufacturing Science within NEREID was to tions stems from their importance in European industrial sce- extend this benefit to the increased complexity and variety of narios and from the broad coverage they offer in terms of ad- technologies developed for More-than-Moore, but also for dressing most of the technology requests useful for building the nanoscale FET and Beyond CMOS. basis of an effective roadmap. Accordingly, these three applica- The scaling down of the MOS transistor has driven the pro- tions lead to three different tables as shown in Figure 10. gress in the ICs performance and the cost per function of the Out of the work done, it was possible to generate the first devices has dropped accordingly. For complex devices, the de- general recommendations for the future of System Design and crease of the cost per functions is achieved by the development Heterogeneous Integration in Europe which are summarised as: of derivative options on top of the core processes and the inte- gration of heterogeneous processes. This leads to increasingly • Validation emerged as the most widespread need and chal- complex line management driven by many process generations, lenge for future systems; multiple products with short life cycle and high variability in • Add Software in the middle, starting from the application; terms of demand. The roadmap aims to activate a converging network of experience and competency involving the academic • The value is not in the device itself, but in system integra- community for the development of new tools and methods for tion and in the related data, the information is at system fab productivity needed to increase efficiency in the fab by level; managing cycle time, advancing equipment and process control • Balance of how much calculation is done at each node ver- and yield enhancement by providing a reference schedule. sus the energy for transmission (for reliability/security rea- The section of the roadmap on Equipment and Manufactur- sons as well); ing Science was drafted after several consultations with techni- • It is strategic to decide where to position the intelligence; cal experts during domain workshops, by analyzing the avail- able information of the other work packages, by reviewing the • The future is to move from Embedded Computing to Em- application-oriented talks presented during the general work- bedded Intelligence; shops and the presentations given at the cross-domain work- • It is important to define standards for interoperability. shop and by aligning with the “Electronic Components and Openness of standards cannot prevent monetisation; Systems Strategic Research Agenda (ECS SRA)” (s. Figure 11. ). • Re-Usability / Reconfigurability have to be considered; • Software-like re-programmability with (almost) hardware like efficiency; • Energy management is key, in particular for limiting Con- sumption and categorizing the application in terms of En- ergy Boundaries; • Automated Design Space Exploration and Automated De- sign Decisions have to be inserted in future tools; • Transition from Connected Devices to Distributed Embed- ded Systems (System of Systems) leading to Network Syn- thesis, Network as a Design Dimension; Figure 11. Information gathering process for roadmap creation on Equipmnet • Environment is Part of the System. and manufactuirng It was highlighted the importance of Sensor Fusion and Validation at system level, taking into consideration the envi- In the context of equipment and manufacturing science no ronment where a system will operate (Environment-aware De- real figures of merits were given, but comprehensive tables sign). were developed, which depict the maturity level (TRL) over time for the individual solutions to be considered. This part of The strategic conclusion of the road mapping work was that it the roadmap is divided in three areas, which are further struc- is for Europe a very good opportunity to drive an increase in tured in several main topics: System Knowledge. In Europe many important stakeholders • More Moore including Conventional technology (i.e. Tech- technologies surveyed included spintronics, neuromorphic nologies, Interconnects, Material/thin film growth, Pattern- computing, nanoscale heat transfer, phononic computing, 2D ing and Metrology) and Beyond CMOS, new compute materials, topological insulators, nano-optomechanics and mo- paradigms and memory systems, lecular electronics. Considering the maturity of the device technologies, the suitability of the devices for information pro- • More-than-Moore including Heterogeneous System-on- cessing and their integrability, the selection of topics was nar- Chips integration and Process technology for applications, rowed down to photonic and nanomechanical computing, com- • Manufacturing Science including Equipment, Safety, puting with spins and magnons, neuromorphic computing, Health (ESH), Productivity, Automation and Yield. steep-slope devices, statistical/thermal physics and related computing approaches. The feeling exists, that with the worldwide effort on mate- rials, processes and manufacturing in the domain of More Today’s advanced CMOS technology operates at energies Moore, the imminent needs of European application domains is of the order of 104 kBT per binary switching, which gives up to covered. However, in this part of the roadmap activities were about four orders of magnitude for device innovations down to covered, where Europe is leading in terms of materials, proc- fundamental limits. Since 2010 the voltage scaling has been set esses and manufacturing, but where the demand from applica- at values close to 0.7-0.8 V. This is due to the conventional tion side is stronger outside of Europe (e.g. EUV lithography CMOS electronics relying on thermal excitation of electrons equipment). For More Moore there is quite a confidence, that over a barrier, requiring an operating voltage many times larger nearly all anticipated equipment and materials for the next than the thermal voltage, kBT/q, needed to maintain a good on- technology nodes will be timely available, by insuring to manu- off ratio for a digital switch. Attempts to scale down the facturers the long-term visibility needed to allocate the R&D threshold voltage will result in an exponential increase of the efforts. In the area More Moore, Europe is an important sup- off, or leakage, current, of at least ten-fold for every 60 mV of plier of materials and processes to the international market. Vth reduction at room temperature. To address such a funda- There are remaining shortcomings in respect of equipment and mental problem, new classes of steep-slope switches have material in the area of Beyond CMOS, new compute paradigm emerged with the main goal to lower the operation voltage and, and memory systems (see the following section H for further consequently, the power consumption. One promising candi- information). date for low power switching is the Tunnel FET, a solid-state semiconductor device designed as a gated p-i-n diode that op- In the More-than-Moore area, where Europe is leading erates in reverse bias and exploits quantum-mechanical band- from an application perspective, like automotive, industrial and to-band tunneling at one of the junctions. medical, NEREID identified in the corresponding part of the roadmap only a few issues with the timely availability of In neuromorphic computing, the electronic circuits mimic equipment and materials. There are still some uncertainties on the operation of neurons and their architectures to enhance the upcoming materials like Ga2O3, AlN and diamond (see also computational efficiency and reduce the power consumption. section D). In particular this section on More-than-Moore rep- The circuits can be digital, analog or mixed, and combined with resents the European abilities and strengths and is a compre- memory functions. Neuromorphic circuits use typically non- hensive extension to the corresponding IRDS chapter. von Neumann architectures and can be realized by integrating non-volatile memory cells as the synapse with CMOS circuitry Regarding Manufacturing Science no serious concerns have representing the neuron [24]. Recently, photonic synapses been identified. However, activities on yield enhancement and based on phase-change materials have also been demonstrated productivity will be continuously executed in order to stay [25]. The circuits can include machine learning algorithms to competitive on the global market. Furthermore, upcoming perform, e.g., pattern recognition. Supervised learning is based regulations on ESH (like material replacement) might require on repetition of numerous samples, [26] and unsupervised additional efforts, which are not yet known. learning needs a few presentations to master the function [27] H. Beyond CMOS Spintronics [28] has several aspects related to information technology, since spins can be seen as an extra degree of free- The scope of Beyond CMOS activities covers several dom combined with charge [29]. emerging technologies with TRLs ranging from 0-1 to 4-5 and a wide range of device concepts and materials, some of which Examples are spin FETs [30] and spin valve devices [31]. are compatible with the current CMOS platform. It also en- Pure spin currents manifest themselves in, e.g., the spin Hall compasses novel information processing paradigms in the time effect, which can be exploited in microwave oscillators [32] frame of five to ten years and beyond. The applications could and, potentially, in neuromorphic systems [33]. Spin waves in include distributed computation within the expanding IoT or magnetic insulators, arising from coupled precession of mag- the realisation of accelerators on CMOS platforms to increase netic moments, can transfer information without moving processing speed. The focus includes fundamental issues like charges and, consequently, without Joule heating or dissipation. heat dissipation at the nanoscale, one of the most critical bot- Spin waves, or magnons when quantized [34], can propagate at tlenecks in current IC technology. The target is to identify the wavelengths down to nm and frequencies up to THz. potential, challenges and shortcomings of emerging technolo- gies applied to information processing, while keeping in mind the European academic and industrial landscape that somewhat differs from that in the Americas and in Asia. The emerging define the technology roadmap in terms of application re- quirements (in the fields of Energy, Automotive, Medical/Life science, Security, IoT/Smart connected objects, Mobile con- vergence and Digital Manufacturing) and technology evolution (Advanced Logic and Connectivity, Functional Diversification, Beyond CMOS, Heterogeneous Integration and System De- sign, Equipment, Materials and Manufacturing Science). The NEREID Roadmap combined the “application pull” approach, focusing on the requirements of European semicon- ductor and applications industry and main societal challenges, with the “technology push” coming from the advanced con- cepts developed by Research Centres and Universities, in order to achieve an early identification of promising novel technolo- gies, and cover the R&D needs all along the innovation chain. This combined approach allowed the convergence between ap- Figure 12. SEM image of a spin-valve device. A current of a few µA flows plications and technologies. The presented common work be- between the first two ferromagnetic electrodes. Voltage arising from the pure tween technology and applications led to the early identifica- spin-current is measured between the last two electrodes. This is the non-local tion of the main challenges and the most promising technolo- configuration, where the charge and spin currents are separated (Courtesy of gies needing additional R&D activities, which will be very use- Dr. Marius Costache, ICN2). ful for the future electronic components systems of European companies leading to a strong impact on the European econ- Phonons, the quanta of lattice vibrations, and thermal fluc- omy and society. tuations are among the lowest energy carriers that can be con- sidered for information processing with energies down to frac- At the time when this manuscript has been completed the tions of a meV. With some imagination, fluctuations can be NEREID project is proceeding towards its conclusion and it is thought of as low-frequency phonons, basically a kind of wrapping-up the results to publish the final version of the acoustic phonons. Acoustic phonons are the carriers of thermal Roadmap with the detailed recommendations. Today the “pre- energy in non-metallic solids. Brownian motion and fluctua- final version of the NEREID Roadmap can be found on tions are also closely intertwined sharing randomness as one of https://www.nereid-h2020.eu/roadmap. By the time of publica- their main characteristics. As physical dimensions decrease, the tion, the final Roadmap and recommendations will be available mechanical modes of a structure can couple to electrons and on the website. photons in what is known as nanomechanics [35] and optomechanics [36], respectively, providing new possibilities ACKNOWLEDGEMENTS to develop very low, even entropy-driven, information technol- ogy. The authors are grateful to all of the participants of the three NEREID General and all Domain Workshops as well as Within quantum technologies photonics holds the key for to all project partners. This is because these experts gave their quantum repeaters, for which long-distance transport of qubits views and time and shared their experience on applications is essential. Europe has a strong base in silicon and III-V pho- and/or technologies which has been included/considered in the tonics which, combined with silicon electronics, results in a NEREID roadmap, where they are mentioned. However, the silicon-based platform for a myriad of quantum technologies responsibility for the content of this paper rests with the au- and their applications. Alternative computing based on photon- thors. Thanks are extended to the support of the EU, which has ics offers a number of advantages. In particular, unlike most been funded the NEREID project as a Cooperation and Support other qubits, photons do not suffer from decoherence and it is action for three years from the European Union’s Horizon 2020 possible to use linear circuits to perform quantum computing research and innovation programme under grant agreement No [37]. 685559. III. CONCLUSIONS AND RECOMMENDATIONS (I) REFERENCES The presented article summarizes the three years’ work of [1] F. Balestra, Nanoscale CMOS: Innovative Materials, Modeling and the very successful NEREID Project which led to an ambitious Characterization, Francis Balestra Ed., ISTE-Wiley (2010) ; Nanoelectronic Roadmap including all the important technolo- [2] F. Balestra, Beyond CMOS Nanodevices (tomes 1 et 2), Francis Balestra gies for many applications representing large future markets. Ed., ISTE-Wiley (2014). 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Romani et al., IEEE Computer 2017 The important assets of the NEREID roadmap are the following: • This paper introduces the new NanoElectronics Roadmap for Europe covering topics from Nanodevices beyond CMOS and Innovative Materials to System Integration • The roadmap has been worked by the European CSA project NEREID which has been funded by the European Union’s Ho- rizon 2020 research and innovation programme under grant agreement No 685559 • The NEREID roadmap gives a projection of the evolution of many Figures of Merit (FoMs) vs time for covering the most promising technologies including novel functionalities • The NEREID roadmap delivers an understanding of the dependencies between short/ medium term (e.g. More Moore and More than Moore) and long/very long term (e.g. Beyond CMOS) activities • The NEREID roadmap is based on a strong interaction between application and technology experts, coming from leading re- search players in industry and academia, especially by face to face exchange during many Workshops. • The NEREID roadmap is created in a combination of a top-down approach, which is application driven, and a bottom-up one, based on planned technology evolution to prompt new ideas for disruptive products and applications Ralf Popp received his Dipl.-Ing. degree in Electrical Engineering in 1996 from the University of Hannover, Germany. From 1997 to 2002, he worked at the Institute of Microelectronic Systems, University of Hannover, in the computer-aided design of analog circuits. His primary spe- cializations were the symbolic analysis, behavioral modeling and simulation of analog and mixed-signal circuits, a field in which he is currently writing his Ph.D. thesis. In 2002, Ralf joined edacentrum, where he is engaged in the management of research and in- novation projects in nan- and microelectronics and where he is responsible for technical analyses and public relations.