Velocity Saturation effect on Low Frequency Noise in short channel Single Layer Graphene FETs

Graphene devices for analog and RF applications are prone to Low Frequency Noise (LFN) due to its upconversion to undesired phase noise at higher frequencies. Such applications demand the use of short channel graphene transistors that operate at high electric fields in order to ensure a high speed. Electric field is inversely proportional to device length and proportional to channel potential so it gets maximized as the drain voltage increases and the transistor length shrinks. Under these conditions though, short channel effects like Velocity Saturation (VS) should be taken into account. Carrier number and mobility fluctuations have been proved to be the main sources that generate LFN in graphene devices. While their contribution to the bias dependence of LFN in long channels has been thoroughly investigated, the way in which VS phenomenon affects LFN in short channel devices under high drain voltage conditions has not been well understood. At low electric field operation, VS effect is negligible since carriers velocity is far away from being saturated. Under these conditions, LFN can be precicely predicted by a recently established physics-based analytical model. The present paper goes a step furher and proposes a new model which deals with the contribution of VS effect on LFN under high electric field conditions. The implemented model is validated with novel experimental data, published for the first time, from CVD grown back-gated single layer graphene transistors operating at gigahertz frequencies. The model accurately captures the reduction of LFN especially near charge neutrality point because of the effect of VS mechanism. Moreover, an analytical expression for the effect of contact resistance on LFN is derived. This contact resistance contribution is experimentally shown to be dominant at higher gate voltages and is accurately described by the proposed model.


Introduction
Extensive research has taken place the last decade after the discovery of graphene 1-2 due to its exceptional properties. Carrier mobilities up to 2.10 5 cm 2 /V.s and saturation velocities of 4.10 7 cm/s led the scientific community to accept the challenge and take advantage of graphene in electronic applications by fabricating graphene transistors (GFETs) [3][4] . Despite the fact that graphene's zero bandgap is a deterrent for digital operation, the developments of GFETs for analog and RF applications is ongoing with very promising results. Frequency multipliers 5 , voltage controlled oscillators 6 and THz detectors [7][8][9] are some examples of electronic applications, while other applications of graphene are chemical-biological sensors [10][11][12][13] and optoelectronic devices 14 . The performance of all the above devices and circuits can be degraded by the effect of Low Frequency Noise (LFN) which can be up-converted to undesired phase noise in high frequency circuits and it can also affect the sensitivity of sensors [5][6][7][8][9][10][11][12][13][14] . In addition, LFN analysis can provide significant conclusions regarding the quality and reliability of graphene devices 15 . There are three main mechanisms that generate LFN in semiconductor devices: a) carrier number fluctuation (ΔΝ), b) mobility fluctuation (Δμ) and c) contact resistance (Rc) contribution (ΔR). ΔΝ model 16 is based on trapping/detrapping mechanism where carriers can be captured and then emitted at border traps near the dielectric interface of a semiconductor 17 . A Random Telegraph Signal (RTS) in time domain which results in a Lorentzian spectrum is generated by each such trap. Supposing that these traps are uniformly distributed, then the superposition of these Lorentzians can cause an inversely proportional trend of the Power Spectral Density (PSD) of noise with frequency. For this reason the LFN is also known as 1/f (flicker) noise. In transistors with very small dimensions, the limited number of traps can lead to Lorentzian-shape PSDs, but this has not been yet observed in GFETs. Δμ model 18 is expressed by empirical Hooge formula and is considered to be caused by fluctuations of carrier mobility. Finally, Rc can also influence LFN and this contribution can be very significant in GFETs at short channels where Rc contribution cannot be neglected. There are many LFN models available in bibliography describing the above three effects for Metal-Oxide-Semiconductor FETs (MOSFETs) [19][20][21][22] . The same three mechanisms have also been found to be responsible for LFN in a. Departament Companys 23,08010 Barcelona, Spain * Email: nikolaos.mavredakis@uab.es Electronic Supplementary Information (ESI) available: At first, a thorough analysis of the effect of Velocity Saturation phenomenon on Drift-Diffusion current equation is provided in Section A. Then, an analytical solution for effective length is presented in Section B. In Section C, Fig. S1 illustrates the behaviour of chemical potential and longitudinal field locally in the channel at different bias conditions. After that, a more detailed description of the theoretical derivation of both carrier number and mobility fluctuation models is provided in Section D. There, Fig. S2 presents the behaviour of all the local noise expressions related to the above effects, along the channel at different operating points. The process that integrals are calculated for different cases of chemical potential values is presented in detail in Section E. Fig.  S3 in Section F presents the comparison of IV data and model for the rest of the available devices which are not included in the main manuscript while Fig. S4 in Section G shows the Low Frequency Noise data of these transistors vs. the proposed model. GFETs [23][24][25][26][27][28][29][30][31][32][33][34][35] . Δμ effect is known to dominate in metals 18 and ΔΝ in semiconductors 17 where trapping/detrapping prevails, and since graphene can be considered a metal as well as a semiconductor, both of the above effects can contribute to its LFN. In fact, LFN nature in GFETs is strongly related to the number of layers since ΔΝ mechanism becomes more significant as this number is decreased while in multilayer GFETs Δμ is more important 24 . As it was mentioned before, ΔR can also play an important role because of the Rc values in GFETs. The most significant experimental characteristic of gate bias dependence of LFN in GFETs is the M-shape trend with a minimum close to charge neutrality point (CNP) [25][26][27][28][34][35] . In a previous work 35 , an analytical physics-based bias dependent model for long channel single-layer (SL) GFETs was proposed and successfully validated with experimental data. Both ΔΝ and Δμ models were shown to contribute in total LFN, especially near CNP, while the Rc effect on LFN was observed at higher gate voltage regions but not analytically modeled. In addition, a strong relation between gate bias dependence of LFN and residual charge near CNP was shown; ΔΝ effect is responsible for M-shape behavior but as residual charge decreases, a Λ-shape trend can be observed 35 . Moreover, even a minor increase of drain voltage, was shown to slightly affect the homogeneity of the channel especially near CNP and this results in a small rise of LFN there. Those experiments were conducted at very small drain voltage values (VDS=20, 40, 60 mV) and thus, important phenomena that are significant at quite high electric fields such as Velocity Saturation (VS) could not be studied. Analytical modeling of LFN in short channel GFETs and the contribution of VS effect on it remain largely uninvestigated. In Si devices, VS effect causes a reduction of LFN at high electric fields 36 and this is also the case in GFETs as it will be shown in this work for the first time. VS effect is generated by optical phonon scattering mechanism and particularly for GFETs, saturation velocity usat is usually approximated inversely proportional to chemical potential Vc [37][38][39] . While this relationship is acceptable away from CNP, it is not valid near the specific point where the chemical potential Vc tends to 0 and thus usat becomes very high, even higher than Fermi velocity uf(~10 6 m/s) which is the maximum velocity of carriers in graphene. Thus, a two branch model has been proposed [40][41] where a constant usat value is considered for a quite low graphene net channel charge so that the GFET operates near CNP, while for higher values of charge, a more complicated energy dependent expression is used [40][41] . But if the aforementioned complicated model is used in LFN modeling for short channel GFETs, the equations become so complex, that it is generally impossible to find an analytical solution. That is why, an inversely proportional relation between Vc and usat is considered away from CNP. The fundamental scope of this work is the extension of the model proposed in ref. 35 in order to include the VS effect on LFN. Furthermore, a simple analytical expression for ΔR contribution taken from Si devices 42 is proposed. As described thoroughly in ref. 35, the LFN model is implemented based on the assumption that the GFETs' channel is divided into infinitesimal slices, each of which corresponds to a local noise source 19,22,36,42 . All these local noise sources can be considered uncorrelated and thus, the sum of their PSDs results in the total LFN 42 . In simpler words, by integrating all the local noise contributors along the device channel, the PSD of each LFN mechanism can be calculated. As it will be shown, these integrals can be solved analytically, similarly to ref. 35, based on a chemical potential based compact model [43][44][45] and thus, the LFN model can be easily implemented in Verilog-A and integrated in circuit simulators. The equivalent capacitive circuit of this model [43][44][45] is shown in Fig. 1a. Graphene charge Qgr is stored in the quantum capacitance (Cq); the chemical potential Vc(x) represents the voltage drop across Cq at position x. Vc(x) is defined as the difference between the potential at quasi-Fermi level and the potential at the CNP, as shown in the energy dispersion relation scheme of graphene in Fig. 1a where Vc(0)=Vcs at the source end (x=0) and Vc(L)=Vcd at the drain end (x=L).   [46][47][48][49] . The optical and SEM images as well as the schematic of the graphene device are shown in Fig. 1b. Details on the fabrication process can be found in Experimental data section. The quality of graphene after transfer process was verified by performing Raman characterization. Fig. 1c shows a typical Raman spectra of graphene on the substrate (SiO2/Si) after the device fabrication process. The 2D peak at 2703 cm -1 is fitted with a single Lorentzian component with a full width at halfmaximum (FWHM) of 26 cm -1 . The G peak locates at 1584 cm -1 and has a FWHM (G) of 12 cm -1 .The ratio of the 2D and G peak integrated intensities stands around 2.5, which indicates single layer graphene. The intensity ratio of the D and G peak is very low, ~0.1, which suggests that a very low defect density is present in our fabricated devices.

Results and Discussion
The drain current model proposed in ref. [43][44][45] and on which the LFN analysis of the present work is based, assumes a driftdiffusion carrier transport with a soft VS model [37][38][39][40][41] . In more detail: where W is the width of GFET, μ is the low field carrier mobility, E is the electric field and μeff is the effective carrier mobility which represents the degradation of mobility μ at high electric fields and depends on the ratio of longitudinal electrical field Ex and the critical field Ec. Ec is the value of electric field Ex above which the carriers' velocity saturates. After a more detailed analysis (see eqn (A1-A2) in ESI A), eqn (2) (bottom of the page) is derived which represents the change of integral variable from x to Vc and it will be proved to be very significant for the derivation of the IV and LFN analytical expressions; VS effect is considered through saturation velocity term usat. Then by integrating eqn (2) along the device channel from Source (S) to Drain (D): The denominator of the eqn (3) expresses an effective channel length Leff which accounts for the degradation of ID because of VS effect (see see eqn (A6-A9) in ESI B). The sign of VDS determines the sign of the electric field E and consequently, the sign of the longitudinal electrical field Ex as described thoroughly in ESI A, B. Regarding the value of usat, a two-branch model is used, as mentioned before: The analytical expressions for coefficient k, Fermi velocity uf, graphene charge Qgr, bias dependent term g(Vc) and residual charge related term α are given in ESI A, hΩ is the phonon energy and e is the electron charge. Qcrit is the critical value of graphene net charge above which usat is considered inversely proportional to Vc as shown in bottom branch of eqn (4) while it is constant below Qcrit as it is shown in upper branch of eqn (4). Qcrit=eΩ 2 /(2πuf 2 ) and from there Vccrit can also be calculated. All plots of Fig. 2 are for a GFET with L=100 nm. In Fig. 2a and 2b, the drift velocity udrift and the saturation velocity usat are shown vs. the chemical potential Vc at the CNP and away from it respectively. In each graph, udrift at low (left subplot) and high (right subplot) drain voltage are shown (VDS=60 mV and 0.3 V) as a solid line; usat is also shown with dashed lines. At low drain voltage, udrift is much smaller than usat and thus, VS effect is negligible. This is the case both at and away from the CNP. On the contrary, at higher drain voltage, udrift is still smaller but comparable to usat which means that VS effect starts to become significant for every gate voltage regime. This is also shown in terms of electric field Ex in ESI C (Fig. S1). In Fig. 2c, effective mobility μeff is shown vs. effective gate voltage VGEFF (back-gate voltage overdrive) again for both drain voltage values mentioned before. As it was expected at low drain voltage, μeff is quite close to long channel mobility μ, while for higher drain voltage, VS effect causes a significant degradation of μeff. In accordance with the usat model described in eqn (4), effective mobility is shown to get maximized at CNP. In more detail and as it is shown in Fig. 2a and 2b, usat becomes maximum at CNP and consequently Ec, which is proportional to usat, is also maximized (see eqn (A1) in ESI A) while the ratio Ex/Ec gets minimum (see Fig. S1 in ESI C). As a result from eqn (1), μeff is maximum at CNP. IV and LFN data were measured for six different GFETs with W=12 μm and for three available channel lengths; L=300 nm for A300, B300 devices, L=200 nm for A200, B200 devices and L=100 nm for A100, B100 devices (see Experimental Data section for more details on fabrication and measurements). The back gate voltage was swept from VG=0 to 1.4 V with a step of 50 mV for transfer characteristics while for LFN spectra the sweep was from VG=0.6 to 1.3 V with a step of 50 mV, covering regions both away and near CNP. The measured frequency range was from 1 Hz to 1 kHz. Moreover, five different drain voltage values were recorded for both IV and LFN setups (VDS=30m, 60m, 0.1, 0.2 and 0.3 V) in order to cover the low and high electric field region which is crucial for studying VS effect. In a few cases, some drain voltages were omitted since the IV as well as LFN data were completely out of order, probably because of leakages or possible break down of the devices at higher electric fields. In more detail, for A300, A100 and B100 GFETs all five drain voltages were measured, for B200, A200 GFETs, VDS=0.3 V is missing while for B300 GFET, VDS=30 mV is missing. Fig. 3 presents the transfer characteristics of a) A300, b) A200 and c) A100 GFETs at all available drain voltages. The compact model reported in ref. [43][44][45] was used for simulating drain current and the fitting with experimental data is of high quality both near and away CNP at p-type region. There is an asymmetry in drain current data at higher gate voltages since they are lower in n-type than p-type region and this can be explained either by a different mobility at the two operating regimes or by a parasitic p-n (n-n) diode which is formed between the channel and the contact when the device is biased in the p(n)region giving rise to different contact resistances 50 .The model is symmetric so it can provide identical behaviour at p-and n-type regimes away from CNP. The best fit was achieved at the whole p-type region, near CNP and up to a value of VGEFF≈0.15 V in ntype regime. We focused our attention on this region which presents the highest transconductance, a crucial figure of merit for RF applications. Table 1 presents the parameter set of the IV model which includes the long channel carrier mobility (μ), the back gate capacitance (Cback), the flat band back gate voltage (VBSO), the contact resistance (Rc), the inhomogeneity of the electrostatic potential (Δ) which is related to the residual charge density ρ0 [43][44][45] and the phonon energy (hΩ) which is related to VS effect. One parameter set is used for all bias conditions at each GFET; all the above parameters except hΩ are extracted for low drain voltages, while hΩ is extracted for the higher ones. Fig. 4a shows the equivalent noise subcircuit 35,42 where a random local current noise source δIn with a PSD SδI 2 n is used to model the local fluctuations. This noise subcircuit and its operating principles is analysed thoroughly in ref. 35. Fig. 4b and 4c illustrate the LFN

a) b) c)
Please do not adjust margins   35,43 . NT, which is the dielectric volumetric trap density per unit energy (in eV -1 cm -3 ), is used as a first model parameter related to ΔΝ effect 35 while αH, which is the unitless Hooge parameter, is used as a second model parameter related to Δμ effect 35 . For both ΔΝ and Δμ cases, the total PSD of normalized drain current noise divided by squared drain current at 1 Hz is calculated by considering the integral from S to D (see eqn (A15, A22) for ΔΝ and Δμ, respectively in ESI D). Then by applying eqn (2), the integral variable of LFN changes from x to Vc (see eqn (A16, A23) for ΔΝ and Δμ, respectively in ESI D). The latter is essential since the IV model is a chemical potential based model 35,[43][44][45] . Since eqn (2) has two terms on the right hand side, this results in two ΔΝ related terms, ΔΝA and ΔΝB, and two Δμ related terms, ΔμA and ΔμB, which are derived in the format of integrals before being solved analytically. (see eqns (A19-A20, A26-A27) of ESI D). VS phenomenon contributes to LFN both through Leff, which is contained in constants A1, B1, A2, B2 which are defined in ESI D, and through second right hand term of eqn (2). ΔΝA and ΔμA, which come from the first right hand term of eqn (2)

a) b) c)
Please do not adjust margins  needed in order to take the total solution. In the present work, a simple model for ΔR contribution is also derived taken from Si devices 42 since the effect of Rc on LFN is significant especially at higher-gate voltages as it will be shown later. ΔR model is described in eqn (10) where SΔR 2 expressed in Ω 2 /Hz, is the third parameter of the proposed LFN model and gms, gmd are the source and drain transconductances 45 . In order to calculate the total LFN, the three different contributions have to be added as:  I  I  I  I   I  I  I  I The behaviour of all compact expressions of LFN related terms of eqns (5-10) is analysed in Fig. 5. Normalized drain current LFN divided by squared drain current and referred to 1 Hz, SIDf/ID 2 is shown vs. effective gate voltage VGEFF for a low and a high drain voltage value (VDS=60 mV, 0.3 V). In Fig. 5a ΔΝA, ΔΝB and ΔΝ terms of carrier number fluctuation mechanism are presented. ΔΝ effect is responsible for M-shape of LFN 35 and this is also confirmed in Fig. 5a. Apart from ΔΝA long channel term, ΔΝB also follows an M-shape trend. For low drain voltage, ΔΝB is negligible

a) b) c) d) e) f)
and ΔΝA coincides with ΔΝ. This is totally acceptable since at this region, VS effect does not contribute at all to drain current as well as to LFN. On the other hand, for higher drain voltage, the contribution of VS effect is apparent. The carrier number fluctuation term ΔΝ which is calculated by the subtraction of ΔΝA and ΔΝB as it is shown in eqn (9), is significantly lower than ΔΝA which in fact represents the long channel case. Similar conclusions can be extracted in Fig. 5b where the ΔμA, ΔμB and Δμ terms of mobility fluctuation effect are shown. Again, for low drain voltage, ΔμB is much lower than ΔμA and as a consequence ΔμA dominates. For high drain voltage though, the difference ΔμA-ΔμB, which results in Δμ according to eqn (9) 46-49. In Fig. 6 we show the normalized total LFN SIDf/ID 2 vs. effective gate voltage VGEFF for the devices whose transfer characteristics are presented in Fig. 3. More particularly, the LFN for the A300 GFET with L=300 nm is shown in Fig. 6a and 6d, the LFN for the A200 GFET with L=200 nm is shown in Fig. 6b and 6e and the LFN for the A100 GFET with L=100 nm is shown in Fig. 6c and 6f. Upper plots correspond to the LFN results from the highest and lowest drain voltage while lower plots to the rest of the drain voltages available. LFN data is represented by round markers while model is shown with solid lines. For comparison, long channel model proposed in ref. 35 is also shown in dashed lines. In fact, this long channel model equals to the sum of ΔΝA, ΔμA and ΔR terms of eqns (5,7, and 10), respectively. In the upper plots, it is clear that the proposed model coincides with the long channel model at low electric field regime where the VS effect is not significant. The agreement with the data is consistent apart from some regions away from CNP at n-type regime where the IV model was also not consistent (See Fig. 3) due to asymmetries of the data. At higher drain voltage region, the proposed short channel model is very accurate. It predicts a reduction of LFN in comparison with long channel model and this fully agrees with experimental data especially at CNP where ΔR is not significant. This phenomenon is analyzed and modeled for the first time. In the down plots of Fig. 6, the model is tested for the rest of drain voltages and it can be observed that its behavior remains precise. For drain voltages up to 0.1 V the difference between the short and long channel model is negligible but above this value, VS effect significantly reduces LFN PSD and this is accurately captured by the proposed model. ΔR contribution is significant away from CNP especially for higher drain voltage levels where LFN PSD is almost constant and ΔR model successfully predicts this behavior. The IV and LFN models' validation for the remaining devices B300, B200 and B100 is presented in ESI F and G (Fig. S3 and S4 respectively). The three extracted LFN parameters, NT, αH and SΔR 2 are shown in Table 1. The value of NT ranges from ~5.5·10 18 -8·10 19 eV -1 cm -3 depending on the device and is a little lower than values extracted in other works [33][34][35] related to GFETs while is also closer to typical values of MOSFETs [21][22]42 . Regarding αH, is between ~2.5·10 -4 -5·10 -3 which is similar to ref. 35 and higher than MOSFETs [21][22]42 . Finally, SΔR 2 parameter ranges from ~3.4·10 -3 -2·10 -2 Ω 2 /Hz which is much than MOSFETs 21, 42 but this is reasonable since the contact resistance Rc of the measured GFETs is more intense than Si devices.

Conclusions
In conclusion, a comprehensive physics-based analytical LFN model for short channel SL GFETs is proposed in the present study which is proved to be very consistent.

Devices fabrication
The main features of our GFETs structure are the bottom gates with native oxide. We designed different gate length of 100 nm, 200 nm and 300 nm. The channel width is 2x12 μm. CVD graphene grown on Cu foil 49 was used for wafer scale fabrication and good electrical properties. The double bottom-gates were patterned by using electron beam lithography (EBL), followed with 40 nm Al deposition and lift-off process. After, the dielectric of Al2O3 (~ 4 nm in thickness) was obtained by exposing the sample with bottom-gate structure to the air at room temperature. In this work, the bottom-gate structure was used in order to ease the natural oxidation process and avoid e-beam exposure on graphene channel. Monolayer graphene was transferred on top of the pre-patterned bottom-gates. Reactive ion etching (RIE) O2 plasma was used to define the channel. Source and drain were obtained by depositing Ni/Au (20 nm/30 nm) followed by a lift-off process. In order to make our devices compatible with on-chip probe measurements, the device fabrication was embedded in a 50 Ohm coplanar waveguide (Fig. 1b). The waveguide is realized by EBL, followed by deposition of Ni/Au (50 nm/300 nm).

Electrical characterization
At each polarization, the drain-to-source current signal is measured with a custom-made current-to-voltage converter with two parallel inputs for DC (low-pass filter at 0. 1Hz for I-V characteristics) and AC (band-pass filter from 0.1 Hz to 7 kHz for noise characterization). The data acquisition is performed using a National Instruments DAQ-card system (NI 6363). In order to stabilize the IDS current value at each gate bias, the sampling condition is dIDS/dt <1·10 7 A/s before each recorded point. For the noise characterization, the sampling frequency was set to 50 kHz for a period of time of 13 seconds choosing the Welch's method in which 10 segments overlap by 50%.

Conflicts of interest
There are no conflicts to declare Then from eqns (A1, A2) we can end up with eqn (2) of the main manuscript with k=2·e 3 /(π·h 2 ·u 2 f) [43][44] where uf is the Fermi velocity (=10 6 m/s), h the reduced Planck constant (=1,05·10 -34 J·s). Bias dependent term g(Vc) which expresses the normalized drain current ID is calculated as 43 while graphene charge is given by [43][44][45] : and chemical potential at source and drain as 43 : where α=2.ρ0.e is a residual charge (ρ0) related term, VGtop-VGtop0 and VGback-VGback0 are the top-and backgate voltage overdrives, respectively. The discrimination between positive and negative VDS defines the sign of electrical field E and consequently the signs of second terms of the right hand of eqn (2) of the main manuscript. In more detail, if VDS>0 then dV<0 and E=-dV/dx>0 (top branch of eqn (2)) while if VDS<0 then dV>0 and E=-dV/dx<0 (bottom branch of eqn (2)). This relation between dx and dVc is very crucial for the calculations of LFN as it will be shown later 35 .

B. Supplementary Information: Leff calculation
In the denominator of eqn (3) of the main manuscript, Leff is defined which represents an effective length to take into account VS effect. The thorough procedure of its extraction will be presented below. From eqn (A2) we can take: If we integrate each term of eqn (A6) from S (Source) to D (Drain): On the other hand, if VDS<0 then dV>0 and -dV<0 and similarly to before eqn (A7) becomes: Eqn (A8, A9) are identical to eqn (3) of the main manuscript. It is very significant to solve the denominator integrals of the above equations analytically in order to use them in LFN expressions where Leff is present.
The positive drain voltage case will be shown while the negative one can be solved similarly. To proceed with the calculation, two cases should be discriminated regarding usat value as described in eqn (4) of the main manuscript; one for Vc<Vccrit where usat is constant and the other for the opposite conditions where usat is inversely proportional to sqrt(Vc 2 +a/k). For the first case where usat is constant we take: while for the second case where usat is inversely proportional to sqrt(Vc 2 +a/k) we have: where S, N are defined in eqn (4)  concerned, it is much lower than critical field Ec(x) at low drain voltage and this is the reason why VS effect is negligible there while at high drain voltage Ex(x) becomes comparable to Ec(x) and this affects the operation of the device due to the degradation of effective mobility as it is illustrated in Fig. 2c of the main manuscript. Moreover, LFN is also affected as it will be shown in the next section.  As the LFN model is based on a chemical potential based model [43][44][45] , the integral variable should change from x to Vc according to eqn (2) of the main manuscript and this is the point where VS effect enters noise calculations. We will proceed with the case of VDS>0 but the procedure is similar for a negative VDS.
After applying eqn (2) of the main manuscript at eqn (A15): Eqn (A16) can be split into two integrals as it is shown below: As far as mobility fluctuation effect is concerned, a similar process is followed where:  8 What is inside all the above integrals expresses the different local noise sources which are shown vs.
channel position x in Fig. S2