This is the accepted version of the article: Claramunt, Sergi; Ruiz, Ana; Wu, Q.; [et al.]. «A CAFM and device level study of MIS structures with graphene as interfacial layer for ReRAM appli- cations». Solid-State Electronics, Vol. 186 (december 2021), p. 108080. DOI 10.1016/j.sse.2021.108080 This version is available at https://ddd.uab.cat/record/249448 under the terms of the license 1 A CAFM and device level study of MIS structures with graphene as interfacial layer for ReRAM applications S. Claramunt1, A. Ruiz1,*, Q. Wu2,*, M. Porti1, M. Nafría1, X. Aymerich1 1Electronic Engineering Department, Universitat Autònoma de Barcelona, Barcelona 08193, Spain 2State Key Laboratory of Optoelectronic Materials and Technologies, School of Electronics and Information technology, Sun Yat-sen University, Guangzhou 510275, China *Corresponding authors: ana.ruiz@uab.cat, wuqian33@mail.sysu.edu.cn Abstract— Capacitive Metal-Insulator-Semiconductor structures with graphene as interfacial layer between the HfO2 dielectric and the top electrode have been fabricated and investigated at device level and at the nanoscale with Conductive Atomic Force Microscope. In particular, their electrical properties and variability have been compared to devices without graphene to evaluate their feasibility as ReRAM devices. At device level, we observe that, when graphene is present as an intercalated layer, several resistive switching cycles can be measured, meanwhile the standard structures without graphene do not show resistive switching behavior. Nanoscale analysis showed that the graphene layer prevents the microstructural irreversible damage of the oxide material during a forming process. Therefore, graphene somehow protects the structure during the CF formation. This protection would explain the observation of RS of the devices with intercalated graphene. Keywords— ReRAM, graphene, non-volatile memory, CAFM. I. INTRODUCTION Resistive Random Access Memories (ReRAM) are a type of emerging non-volatile memory devices that offer an excellent scalability, non-volatility, high speed, high performance and compatibility with the current CMOS technology [1]. ReRAM are based in the Resistive Switching (RS) phenomenon, which consists in the change of the resistance that some insulators show under the application of an electric field. A typical ReRAM cell is fabricated by placing an insulator layer between two metal electrodes, the so-called metal-insulator-metal (MIM) structure, or between a metal electrode and a semiconductor (metal-insulator-semiconductor or MIS) structure. In some devices, the switching mechanism is believed to be based on a change in the resistivity of the insulator due to the formation of conductive filaments (CF) [2-9]. Initially, in the fresh state, the device is at the High Resistive State (HRS). If one applies low voltages to the structure, a small amount of current is detected, because of the random distribution of defects in the insulator layer (Fig. 1, black box). Usually the CFs (Fig.1, green box) need to be initially created in a forming process (Fig.1, green curve) by means of the application of a forming voltage (Vf). After the forming process the device will be in the so called Low Resistive State (LRS). In order to switch again to the High Resistive State (HRS), a new voltage pulse must be applied, to trigger the RESET process (Fig.1, blue curve), being the voltage value at which the switching back to the HRS happens known as the reset voltage (VRESET). During this process, the CF is destroyed/closed (Fig.1, blue box), increasing the gate oxide resistance. Finally, once the reset process is done the device could return again to the LRS by applying another controlled voltage pulse, called set process. Now, the CF is re-opened, reducing the oxide resistivity and, consequently, reaching the LRS again. The voltage at which the device switches from the HRS to the LRS is called set voltage (VSET). Usually, VSET is lower than Vf, as the CF was already created during the forming, so during the set processes only a re-opening of the filament is necessary. In either the set or forming processes a compliance current is enforced through the ReRAM cell in order to avoid the complete destruction of the RRAM cell. Once the CF is created, subsequent reset and set processes can change the device between the HRS and LRS states. Depending on the polarities of VSET and VRESET, we can distinguish between two types of RS: unipolar and bipolar. In unipolar RS, V SET and VRESET have the same polarity (either positive or negative) meanwhile in the bipolar case, set and reset processes occur at opposite polarities. Usually the reset process in the unipolar switching is related to the joule heating effect on the CF formed during the forming/set process [10], meanwhile in the bipolar case it is associated mainly to the migration of charges and/or metallic ions [11]. Resistive switching is strongly dependent on the used materials. Regarding the insulator, different oxides have been reported to show RS, but binary metal oxides are the most promising candidates. Examples are titanium oxide (TiO 2) [12], zinc oxide (ZnO) [10], aluminium oxide (Al2O3) [13] or hafnium oxide (HfO2) [2, 4, 9]. The last one is very interesting as it has shown either unipolar or bipolar switching[14], high cycle endurance and retention times [15] and, in top of all, is already widely used in the CMOS fabrication technology [16], so it could be easily integrated, for example, in 3D cross-point arrays [17]. Regarding the electrodes, it has been reported that the formation/destruction of the CF and, in consequence, the behaviour of the ReRAM cell, strongly depends on the materials used in the electrodes and even in the fabrication processes [18]. Recently, novel materials like graphene [19] were proposed to improve the device performance. Graphene is a 1 atom thick carbon-based material isolated for the first time by Geim and Novoselov in 2004 [20] that presents incredible physical properties like high conductivity [21], high thermal transport [22], high flexibility and transparency [23], among others. Moreover, due to its planar nature, it could be compatible with the typical CMOS processes and could be easily intercalated in RRAM cells during its fabrication. 2 Fig. 1. Example of the IV curve of a unipolar RS process (left) and the model of each state (right). First the RRAM cell is at the Fresh state (black color), with the oxygen vacancies distributed randomly through the oxide. Then, after the Forming/Set process (green color), the oxygen vacancies will be concentrated to the most reactive electrode (in this case the top electrode) and a conductive filament is formed. In the Reset process (blue color) the CF is broken due to joule heating. Graphene can be synthetized using different methods. For electronic applications the most common method is the Chemical Vapor Deposition (CVD) [24]. In this method, a copper sheet is used as a catalyst for the growth of the graphene layer using NH3 as a precursor gas. This method has the advantage that is self-limited (it stops at one carbon layer) and nowadays it is possible to fabricate square-meter sized graphene sheets [25]. On the other hand, the resulting graphene sheet is polycrystalline presenting grain boundaries, hindering its physical properties compared to single-crystal graphene [26]. Moreover, it is needed a transference process to place the graphene layer from the copper sheet to the target substrate [27]. Usually, this transference process results in the formation of wrinkles and holes [28], although newer transference techniques minimize these problems [29]. Different studies have been conducted to analyse the effect of an intercalated graphene layer between the top electrode and the insulator in a Metal-Insulator-Metal (MIM) or Metal-Insulator-Semiconductor (MIS) structure in HfO2 ReRAM cells. In Mannequin et. al. they use graphene as a buffer layer between an Au electrode and the HfO 2 insulator layer, resulting in a stabilization of the LRS, leading to a better control of the formation of the CF, as the graphene layer avoids interfacial interactions[30], preventing the migration of metal atoms into the insulator or acting as an oxygen barrier[31]. Note that, due to the localised nature of the CFs, the analysis of the mechanisms involved in the RS is not easy. Many works have studied RS at device level, that is, in devices in which the gate area is covered by a metal film. However, these studies do not allow a direct observation of the nanoscale features of the dielectric material, which is crucial to understand the physical phenomena underlying the CF formation. Therefore, high spatial resolution techniques are required to evaluate their properties. Several works have used nanoscale resolution techniques for the study of the CF characteristics, as the combination of Focused Ion Beam (FIB) and Transmission Electron Microscopy (TEM) [32]. Another alternative is the use of Conductive Atomic Force Microscopy (CAFM), which allows to measure, at the nanoscale, topographical and current maps of a given material. CAFM has been already used to study at the nanoscale high-k dielectrics [33-40], 2D materials as graphene [41-45], RS and the characteristics of the CF [4, 5]. In this work, the electrical properties and variability at device level and at the nanoscale (using CAFM) of MIS structures with and without graphene as interfacial layer between the top electrode and the dielectric are studied. The objective is to compare the electrical behaviour of these two type of structures and preliminary evaluate their feasibility for ReRAM applications. II. EXPERIMENTAL In this work, MIS capacitors with ultra-thin HfO2 dielectrics have been fabricated and analysed. In some of them, a graphene layer between the high-k dielectric and the top electrode was intercalated. These structures are called, from now on, Metal- Graphene-Insulator-Semiconductor (MGIS) devices. The fabrication of the MIS and MGIS devices is schematically depicted in Figure 2. First, a 6.6 nm thick HfO2 layer was deposited by Atomic Layer Deposition (ALD) at 200ºC on a p-Si substrate (Step 1). After that, for the MGIS devices, a graphene monolayer is deposited over the HfO2 (Step 2). To do so, first a graphene monolayer is grown using the Chemical Vapor Deposition (CVD) method over a Cu foil [24]. The graphene monolayer is transferred over the HfO2/Si substrate using the following procedure [46]: first, a layer of PMMA is spin-coated over the graphene/Cu. This PMMA will be a scaffold for the graphene layer when it is detached from the Cu layer. Then, the PMMA/Graphene/Cu is placed in a container with FeCl 3 in order to etch the Cu layer away. After that, the PMMA/Graphene is placed consecutively in a HCl and deionized water 3 container in order to totally clean the Graphene monolayer from Cu residues. Finally, the PMMA/Graphene is “fished” from the water container using the HfO2/Si substrate. After the water is dried, the PMMA is removed using acetone. In order to clean the surface of the graphene layer of possible polymer residues, the graphene/HfO2/Si stack is heated at 400ºC in a H2/N2 atmosphere for 4 hours. The next step is to fabricate the metal electrodes by means of optical lithography (Step 3). First, a thin layer of photosensitive resin was spin-coated over the sample (the HfO2/Si stack for the MIS and the Graphene/HfO2/Si stack for the MGIS). Then, using a Microwriter from Durham-Magneto, 80x80 m2 square windows were patterned by laser and later removed by means of a developer. Following the optical lithography, a metal layer of Au (20nm)/Ti (40nm) was deposited by sputtering using an Evaporation System Auto 306 from Boc Edwards. After the lift-off of the photosensitive layer, this procedure results in a pattern of 80x80 m2 Au/Ti electrodes over the samples. For the case of the MGIS samples an additional step is necessary, consisting in an attack with an O2 plasma using a Reactive Ion Etcher (RIE 2000 CE) from South Bay Technology Inc. in order to eliminate the exposed graphene between the metallic pads (Step 4). Figure 2. Fabrication steps of the MIS and MGIS devices. In Step 1 a HfO2 layer is deposited on a Si substrate. In Step 2 the graphene monolayer is transferred to the future MGIS sample. Then in Step 3 metal electrodes are defined by means of optical lithography and sputtering. Finally, for the MGIS devices, a fourth step is needed in order to eliminate the excess of graphene by means of RIE. Steps 1 and 3 are common for the MIS and MGIS devices while step 2 and 4 correspond only the MGIS devices. The fabricated devices have been analysed at device level (Fig. 3a) with a Semiconductor Parameter Analyzer (SPA) and at nanoscale with a CAFM (Fig. 3b). At device level, current limited (CL) Ramped Voltage Stresses (RVS) were applied (CL=0.1A or 0.1mA), in order to control the CF forming process and evaluate their feasibility as Resistive Switching (RS) based memory devices. At the nanoscale, the morphological and electrical properties of the devices were measured with an Agilent 5500 AFM, which was connected to a Resiscope Module (CSI Instruments [47]) in order to be able to measure currents in a higher dynamic range (from pA to mA) compared to standard CAFMs. With our CAFM setup, the role of the graphene layer on the CF formation was evaluated from the measurement of morphological and current images on areas where the CF was induced with the CAFM tip on devices without top electrode (Fig. 3b). With this configuration, the CAFM tip plays the role of the top electrode. The used tip was a bulk Pt tip from Rocky Mountain Nanotechnology and measurements were obtained in contact mode. For the measurement of the current images and I-V curves at the nanoscale, during the scans, a voltage was applied at the substrate while the tip was grounded. Fig. 3. Scheme illustrating the experimental configuration of device level (a) and nanoscale (b) measurements of MGIS devices. In (b), the AFM tip plays the role of the top electrode. 4 III. RESULTS The electrical conduction and the subsequent forming process of the MIS and MGIS devices have been first investigated from the measurement of I-V curves when CL of 0.1A or 0.1mA were used. Fig. 4 shows a set of typical I-V characteristics measured on different MIS (a and c) and MGIS (b and d) devices, when CL=0.1 A (a and b) and CL=0.1mA (c and d) is applied. The inset corresponds to the Weibull plot of the forming voltage (VF). MIS structures (Fig. 4a and c) show a very small variability in the tunnelling conduction before the forming process. VF also shows very small variations. These results demonstrate that the gate dielectric properties are very homogeneous in the set of devices. However, in the MGIS devices (Fig. 4b and d), larger deviations are observed in both, the currents measured before the forming and in VF (Fig. 4b and d, inset). The I-V curves measured in MGIS devices (Fig. 4b and d) can be classified in 3 different groups depending on its morphology and (VF, IF) values. Few MGIS devices showed higher currents and smaller VF than MIS devices, classified as Group 1 (G1) in Fig. 4b. This group is not observed in the analysed set of devices when CL=0.1 mA. It can be seen that most of the devices behave like those in Group 2 (G2). These MGIS devices mostly show higher V F and smaller IF (although still with high variability) compared to MIS devices. Finally, Group 3 (G3) shows an erratic and much smaller conductivity and higher V F than MIS devices and even MGIS devices from G2. It is worth noting that the fresh current measured before the Forming event is completely different between the different groups. Taking into account that the only new element in the MGIS devices is the graphene layer (compared to MIS devices, without an important variability) we can conclude that the resulting quality of the graphene interlayer after fabrication of the MGIS could be the origin of the different behaviours observed in MGIS devices. Fig. 4. I-V characteristics measured on (a and c) MIS and (b and d) MGIS devices for CL=0.1A (a and b) and CL=0.1mA (c and d). In (c) and (d) the forming voltage is highlighted in a cercle. In order to obtain more insight of this phenomenon, the electrical properties of the MIS and MGIS devices after the forming process have been also analysed. After forming with CL=0.1A, the I-V curves measured on both the MIS and MGIS devices show the typical irreversible post-breakdown conduction behaviour, so that RS was not observed. For MIS devices, the CF formation was also irreversible in the case of the smaller CL=0.1 mA. This result is not unexpected, as the relatively big area of the device (6400 m2) combined with the thin oxide layer (6.6 nm) promotes a hard breakdown independently of the CL applied. However, the behaviour of the MGIS devices when CL=0.1mA is somehow different. The devices in Group 1 did not show RS, which could be related to holes in the graphene layer that may be generated during device fabrication. These holes promote the direct contact between the metal electrode and the oxide layer provoking an irreversible breakdown like in the MIS devices. The high conductivity compared to MIS devices and low VF We detected that some of the G2 and G3 devices 5 showed RS after the forming. Figure 5a shows some examples of the Forming IVs of G2 and G3 devices from Fig. 4d. The I- Vs in green correspond to MGIS devices that showed RS meanwhile those in red are those that suffered an irreversible breakdown. Although there is a mix of behaviours between groups, one can see that irreversible Forming processes are mainly associated to G2 devices, whereas the MGIS that showed RS cycles are mostly linked to G3. In general, G3 MGIS devices present lower conduction and higher VF than the samples from G2. These results could be explained recalling that during Forming/Set process the oxygen ions will bond to the defects in the MGIS graphene layer,i.e., [31], defects present at grain boundaries (GB), wrinkles, etc. The noticeable difference between the fresh I-V curves (before Forming) between G2 and G3, and the fact that for G2 devices usually RS is not observed (as in the MIS devices) suggest that in the G2 MGIS devices there could be cracks in the graphene layer (i.e., regions of the oxide not covered by the graphene layer that are formed during the transference process [28]) that could allow the direct contact between the Ti from the top electrode and the HfO2, becoming preferential sites to the oxygen ions to bond. So, this MGIS would behave similarly to the MIS devices, but, as the top electrode contact area would be smaller, the current would be smaller too, when compared to MIS devices. The few cases in which RS is observed in G2 devices could indicate that the crack in the graphene layer is very small so that a soft-breakdown occurs. In the case of G3, a more homogeneous graphene layer could be present (i.e., without cracks) and the oxygen ions would attach to the grain boundaries and other defects until a soft-breakdown occurred due the oxygen vacancies. Further works are necessary to demonstrate this hypothesis. The corresponding first LRS curve after the forming process for each sample in Fig. 5a is plotted in Fig. 5b. Green colour correspond to the samples that showed RS while red colour to the samples that showed an irreversible CF. Note that the MGIS samples that show a Reset event present lower currents. This phenomenon could be explained by the formation of a thicker CF in the case of a hard breakdown [5] increasing the conductivity of the device in the LRS. Fig. 5. (a) Forming I-V curves of MGIS with CL=0.1 mA and (b) their corresponding LRS curves after the forming process. Green colour corresponds to MGIS that show RS meanwhile red colour curves represents MGIS devices that show a hard breakdown. Although the geometry of the MGIS devices difficult subsequent switching cycles (in a similar way than the irreversible CF formation of the MIS devices), a preliminary study of the variability of the fabricated devices has been performed. Fig. 6a shows, as example, 2 RS cycles measured on the same MGIS device. Note that after the forming, the device was reset from the LRS to a HRS (RESET1, without any current limit) by applying an RVS with the same polarity (unipolar RS). SET and RESET2 correspond to the I-V curves of the second cycle. Therefore, since RS is only observed when graphene is intercalated between the HfO2 and the top electrode, the results confirm that graphene controls the formation of the CF, avoiding destructive microstructural damage and allowing the observation of RS. The device-to-device variability of the first VSET, VRESET and VF was preliminary analyzed. Fig. 6b shows the cumulative probability function of VF (squares), the first VRESET (circles) and the first VSET (triangles) of different MGIS devices that showed RS (CL=0.1mA). Note that the VF variability is larger in MGIS devices (Fig. 4b and 4d) than in MIS capacitors, as observed previously in Fig. 4 (insets), which is also quite high compared to other technologies. The higher variability observed during the formation of the CF in graphene based devices could be related, as previously mentioned, to defects in the graphene layer and/or introduced during the fabrication process [48]. Moreover, VF values are closer to VSET (around 1V) in comparison with other similar technologies that do not use graphene as a interfacial layer (around 2-3V) [49], suggesting that graphene really might have a role in the formation of the CF. Graphene not only avoids irreversible damage (allowing the RS observation), but also makes the re-opening of the CF after the corresponding RESET more difficult (a higher voltage is required) than in other similar technologies [49, 50], further supporting the protective role of the graphene layer. 6 (a) (b) (b) Fig. 6 (a) Example of two RS cycles measured on a MGIS device. (b) Cumulative probability of VF (squares), the first VRESET (circles) and the first VSET (triangles) of different devices. When VRESET and VSET are analyzed (Fig. 6b), one can conclude that their variability is similar (although higher in the case of VSET) to that measured in other technologies. Therefore, in this case, it is not clear if such variability could be related to either the graphene or the oxide properties. Further analysis should be performed to clarify this point, which is out of the scope of this paper. Note also that, due to the VRESET and VSET variability, their statistical distributions are very close, not showing a clear voltage window between them. From a practical point of view, this could be a problem, since our devices show unipolar RS and a clear window between VRESET and VSET would be required. However, it must be taken into account that such distributions correspond to the first VRESET and VSET of different devices, showing the inter-device variability. When the intra- device variability is investigated, the preliminary results are different. As an example, Fig. 7a shows the cycle-to-cycle variability of VSET (black squares) and VRESET (red circles) of one device. The Weibull plots of VSET and VRESET of this device is also shown in Fig 7b. Note that now a voltage window separating both distributions can be observed. Note, moreover, that in the case of the analyzed device, VSET variability is higher than that of VRESET, being this result also compatible with the data shown in Fig. 6b. Further studies are necessary to investigate the origin of this behavior. However, these observations, together with the fact that only few devices showed several RS cycles, allowed us to conclude that when comparing forming, set and reset voltages, VSET is the less stable and controllable parameter. So the most difficult issue for the observation of RS in the fabricated MGIS devices is to control the set voltage without inducing irreversible CFs. (a) (b) Fig. 7. (a) Variability of VSET (black squares) and VRESET (red circles) during 14 cycles observed in the same device. Cumulative probability of V SET (black squares) and VRESET (red circles) is shown in (b). The role of the graphene layer on the formation of the CF in MGIS devices was also investigated at the nanoscale with CAFM. To perform this study, structures as those shown in Fig. 3b, that is, without top electrode, were used (Graphene- Insulator-Semiconductor structures). Identical structures without graphene were also considered as reference (Insulator- Semiconductor structures). Note that during the CAFM measurements, the Pt tip acts as a top (metallic) electrode, so that we will still talk about MIS and MGIS structures but now the top electrode is Pt, so that the obtained data is not directly comparable to those in fully developed structures. In both structures, RVS (without CL) were applied at different sites until the CF was formed. Examples of I-V curves measured with the CAFM in MIS (black) and MGIS (red) structures are shown in Fig. 8. On each sample, three I-V curves were measured at the same site. The first one shows the formation of the CF, while the second and third ones correspond to the post-forming conduction. Note that the currents measured with CAFM (Fig. 8) on the MIS structure before the CF formation are smaller (at a given voltage) compared to those registered at device level (Fig. 4a). This is because the area through which current is collected with the CAFM is smaller: while at device level the current is measured 7 Fig. 8. Forming and the next two I-V curves measured on MIS (black) and MGIS (red) structures measured with CAFM. No CL was used. The maximum current measurable by the setup is 1mA. In both kind of samples an irreversible BD was induced, so the RS could not be observed. through the whole area of the device (80x80µm 2), in CAFM experiments only the current through the contact area between the tip and the sample is registered. This contact area is much smaller (~300nm 2 on oxides), leading to lower currents. The area through which current can flow would also explain the higher currents measured with CAFM in MGIS structures (compared to MIS structures) before de CF formation: although the physical contact area of the CAFM tip with the surface is similar in both cases, the conduction area in the MGIS devices is larger because graphene is not an insulator. In both structures (MIS and MGIS), the second and third I-V curves measured at the same site show a higher conductivity, demonstrating that the CF was actually formed. Note that in both samples, probably due to the fact that a different material was used as top electrode (now the Pt tip plays the role of the top electrode) or because no CL was applied during the forming, irreversible CF were formed and no RS was observed, which is compatible with the results in Fig. 4b. Despite that in any case RS was observed, the comparison of the CFs induced in the samples could provide information at the nanoscale when such CFs are scanned with the CAFM. After the formation of the CF with the CAFM, topographical and current maps of the areas where the CFs were created were measured with the CAFM. Fig. 9 shows topographic (b and e) and current (c and f) images obtained with the CAFM at a gate voltage of 0.1V on the gate area of a MIS (a, b and c) and MGIS (d, e, and f) structure (recall that in this case, the top electrode was the Pt tip), corresponding to the areas where I-V curves such as those shown in Fig. 8 were measured on the region inside the circles. For comparison, Fig. 9a and 9d correspond to topographical images obtained before the RVS were applied. Note that the background current in the MGIS structure (Fig. 9f) is larger than in the MIS device because of the larger conduction area under the tip associated to the non-insulating graphene layer. Fig. 9. Topographical (a, b, d and e) and current (c and f) images obtained with the CAFM on the gate area of a MIS (a, b and c) and MGIS (d, e and f) structure, without top electrode before (a and d) and after (b, c, e and f) RVS were applied at different sites (inside the circles). 8 In the MIS structure, at the site where the CF was created, a hillock in the topography (Fig. 9b), not measured before the RVS (Fig. 9a), was observed (6 nm high), indicating that the oxide has been seriously damaged [51]. Moreover, higher currents (~120pA at 0.1V) than in the rest of the oxide are also registered at the same site, as expected, since a conductive path was created between the two electrodes. In this case, the CF formation has been irreversible and uncontrolled and has completely destroyed the oxide (as shown also in Fig. 8), leading to hillocks that could be related to Dielectric Breakdown Induced Epitaxy [52] (DBIE, damage induced in the oxide microstructure due to thermo-chemical effects) and/or to charge trapping at the conductive filaments [51]. On MGIS devices, however, despite the CF formation is also irreversible, no significant changes were observed in the topographical images measured before and after the CF formation (Fig. 9d and 9e). In addition, in Fig. 9f (MGIS structure), no spot with a remarkable larger current is measured because the CF is masked by the larger background current. Therefore, these results further demonstrate that graphene somehow protects the structure during the CF formation. Although irreversible CFs were also created with CAFM in the MGIS devices (remember that CAFM IV curves were applied without CL), the presence of graphene somehow protects the MGIS structure leading to a softer BD event. This protection observed at the nanoscale would explain the observation of RS at device level in the MGIS devices (Fig. 6a) when a CL is applied, compared to MIS devices where a catastrophic damage was measured (Fig. 4) even in the case of using a CL. This protection could be related to the screening effect of the electric field applied to the structure, already observed in [53] due to the presence of a graphene interface layer. Though the screening degrades the device electrostatics (worsening the performance of transistors [53]), in the case of ReRAM devices it could be a great advantage, avoiding the formation of irreversible CFs, and allowing the observation of RS, as our results suggest. IV. CONCLUSIONS The variability of the CF forming and the RS properties of capacitive structures with thin HfO 2 layers as dielectric and graphene as interfacial layer between the dielectric and the top electrode (MGIS devices) have been analysed (at device level and at the nanoscale, with CAFM) and compared to identical devices without graphene. The device-to-device variability of the MGIS structures, is larger than in MIS capacitors probably related to defects in the graphene layer and/or introduced during the transfer process. The intercalation of the graphene layer prevents the microstructural irreversible damage of the HfO 2 layer allowing the observation of unipolar RS phenomenon at device level, which was not detected in devices without graphene. These results suggests the potential use of the MGIS structures for ReRAM applications. V. ACKNOWLEDGEMENT This work has been partially supported by the Spanish AEI and ERDF (TEC2016-75151-C3-1-R). REFERENCES [1] J. Y. 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