Solid-State Electronics 194 (2022) 108312 Contents lists available at ScienceDirect Solid State Electronics journal homepage: www.elsevier.com/locate/sse SPICE model for complementary resistive switching devices based on anti-serially connected quasi-static memdiodes M. Saludes-Tapia a, *, M.B. Gonzalez b, F. Campabadal b, J. Suñé a, E. Miranda a a Departament d’Enginyeria Electrònica, Universitat Autònoma de Barcelona, 08193 Cerdanyola del Valles, Spain b Institut de Microelectrònica de Barcelona, IMB-CNM, CSIC, 08193 Cerdanyola del Valles, Spain A R T I C L E I N F O A B S T R A C T The review of this paper was arranged by This paper reports the use of the Quasi-static Memdiode Model (QMM) for simulating Complementary Resistive “Raffaele De Rose” Switching (CRS) devices. CRS arises from the anti-serial connection of two memristors and it is used for generating low and high-resistance regions in the I-V characteristic with the aim of mitigating the sneak-path Keywords: conduction problem in crossbar arrays. Here, the use of the QMM for CRS in the form of a six terminal sub­ Resistive switching circuit is explored. While two terminals of the subcircuit correspond to the conventional input and output pins of Complementary resistive switching the CRS structure, the rest provide information about the voltage at the central node, the low-voltage conduc­ Memristor tance of each device, and the low-voltage conductance of the whole structure. Special attention is paid to the simulation of the so-called table with legs hysteresis loop (resistance at fixed bias vs. write voltage), which is often invoked in connection with devices that exhibit switching activity at the two interfaces of a single dielectric layer. Because of the internal potential drop distribution, the switching process takes place alternately at one side of the structure or the other giving rise to a pseudo-CRS behavior. The flexibility of the proposed approach is demonstrated through a series of fitting exercises that involve experimental data reported in the literature. The model script for the SPICE simulator is also provided. 1. Introduction serial connection of two identical devices. The connection of dissimilar structures is rarely explored in the context of CRS. The most well-known The anti-serial connection of two Resistive Switching (RS) devices or CRS models together with the application of our Dynamic Memdiode memristors leads to the so-called Complementary Resistive Switching Model (DMM) were benchmarked in [10]. In this work, instead of the (CRS) behavior. Such a functional structure has been proposed as a way DMM, we use the QMM, which is simpler and more robust but with of mitigating the sneak-path conduction problem in crossbar arrays used reduced programming capability (this is not a limitation when sub­ for information storage and neuromorphic computing [1–3]. Since the threshold dynamic programming is not an issue). Because of this lower SET and RESET transitions of each device occur at opposite voltages complexity, the QMM is more tractable for representing CRS experi­ (bipolar switching), the combined structure typically exhibits ON and mental curves in cases in which no information about the individual I-V OFF conducting windows in the I-V characteristic such as those illus­ curves or the system dynamics (time-dependence) is available. Again, trated in Fig. 1. This is the result of the alternate combination of the low following previous approaches [11–13], we model CRS using two anti- (LRS) and high (HRS) resistive states of the individual devices induced serially connected devices. The memdiode-based model considered for by the application of a voltage sweep. Interestingly, the transmission the simulations consists of a single subcircuit with 6 terminals or pins, windows (ON regions) can exhibit a wide variety of shapes (abrupt/ which, in addition to the simulated I-V curves, provides the device low- progressive) and amplitudes (small/large) that not only are a conse­ voltage conductance curves (conductance loop measured at a very low quence of the material used as the switching layer and the metal elec­ fixed voltage). It is worth mentioning that a key issue for the accurate trodes but also of the particular features of the generated filaments modeling of the CRS I-V characteristic is the realistic modeling of the (oxygen vacancy- or metal ion-based pathways, electroforming voltage, devices that constitute the structure. For that reason, the memristor lateral size, internal series resistance, etc.). Several CRS models can be model considered needs to include all the crucial features required for found in the literature [4–9], and, basically, all of them rely on the anti- the simulation of the individual curves such as the snapback (SB) and * Corresponding author. E-mail address: mercedes.saludes@autonoma.cat (M. Saludes-Tapia). https://doi.org/10.1016/j.sse.2022.108312 Received 23 February 2022; Received in revised form 9 April 2022; Accepted 12 April 2022 Available online 14 April 2022 0038-1101/© 2022 The Author(s). Published by Elsevier Ltd. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by- nc-nd/4.0/). M. Saludes-Tapia et al. Solid State Electronics 194 (2022) 108312 effects can be understood as follows: after the completion of the filament formation process (SET) in a memristive structure, the voltage at the constriction suddenly drops (SB effect) and the current increases following the circuit load line dictated by the series resistance Ri (green solid line in Fig. 2). This resistance can be internal, external to the de­ vice, or both. Beyond this point, the filament laterally expands or ac­ cumulates defects at a constant voltage called the transition voltage VT (vertical line in Fig. 2), which is a characteristic parameter of the insulating material and voltage ramp rate [14,16–19]. Once in LRS, the curve reaches the RESET point at negative bias and drops (SF effect) because of the filament dissolution. Again, the I-V curve follows the load line of the circuit. The red solid line in Fig. 2 corresponds to the same I-V characteristic but takes into account the additional potential drop occurring across the series resistance Ri. Notice that the SB effect is detected in this later representation as an abrupt current increase after the SET event. Depending on the magnitude of the SB and SF effects occurring in each memristive device, the SET and RESET voltages, the threshold voltage, and other factors, the CRS I-V curve that results from the combination of the two devices exhibits abrupt/digital (red line) or Fig. 1. Simulated I-V characteristics with gradual (green line) and abrupt (red gradual/analog (green line) transitions as those illustrated in Fig. 1. line) ON-OFF transmission windows. The curves were simulated with the model Additionally, since we are referring to RS, the resistance or conductance script reported in this work. of the devices depends on their previous history. Very often we are interested in the resistance or conductance of the devices measured at a particular bias, in general, a low bias, because this reflects the hysteretic nature of the devices in the linear regime and under a fixed voltage condition [20]. Subsequently, if needed, this value can be used to compute the read current of the device. However, in order to capture the whole SET-RESET transition, a bipolar voltage sweep is still required. To clarify this issue, let’s consider some simulated results: Fig. 3 illustrates resistance–voltage (R-V) curves corresponding to the individual devices of a CRS structure (Fig. 3(a) and 3(b)) as well as to the R-V curve cor­ responding to the whole CRS structure (Fig. 3(c)). Since these curves are measured at a very low bias, they are independent of that precise bias because the device is in the linear regime. Notice that the series com­ bination of the individual curves leads to the so-called table with legs hysteresis loop, which is a central topic of our paper. These kinds of curves are often observed in perovskite-based devices [21] but have also been observed in TaOx- and HfOx-based structures [20,22]. Importantly, in the case of a single dielectric layer, the table with legs is ascribed to the Fig. 2. Simulated I-V characteristics for a single memristor with (green line) switching activity of both interfaces and not to the conventional and without (red line) SB and SF corrections (V-IRi). The green arrows show the connection of two independent devices. Physically, the conductance voltage sweep direction for the RS phenomenon. Notice that VR = -VT for the modulation has been attributed to different mechanisms such as corrected curve. ISB denotes the triggering current for the SET process. tunneling or to modifications of the Schottky contacts with the elec­ trodes [20,23], but this is out of the scope of this paper. Here, we focus snapforward (SF) effects [14]. These effects correspond to the vanishing the attention on the representation of the phenomenon for circuit and formation of a gap or barrier along the filamentary pathway, simulation environments. respectively, and are essential ingredients for a correct representation of the device behavior as explained in Section 2. To illustrate how our 3. Brief description of the memdiode model model is able to cope with extreme situations such as those depicted in Fig. 1 as well as with intermediate cases, a number of experimental The Quasi-static Memdiode Model (QMM) is considered here for curves found in the literature were analyzed and simulated. One simulating two RS devices anti-serially connected forming a single CRS remarkable feature of our approach is that the proposed model can also structure. The concept is illustrated in Fig. 4(a). The LTSpice CRS script be used to deconstruct the CRS experimental curve into its separate consists of a subcircuit with six terminals: two terminals for the con­ characteristics when, as already mentioned, the corresponding infor­ ventional I-V curve, one terminal for the central node of the structure, mation is not available (not measured) and even when they cannot be and the rest for the low-voltage conductances (individual and combined measured (single dielectric structure). Although this issue is out of the devices). The theoretical framework followed for modeling the structure scope of this paper, as reported in [10], the use of the central terminal or is that proposed by Prof. Chua for memristive devices, namely two node in the CRS subcircuit provides a solution to this problem. It is also coupled equations for each device in the CRS structure: one for the worth mentioning that simulations were carried out using the LTSpice electron flow through a filamentary-type conducting channel and a XVII circuit simulator which can be downloaded for free from the second equation representing the reversible movement of vacancies/ webpage of Analog Devices [15]. ions within the dielectric layer caused by the application of the external electrical stimulus [11–13]. The I-V characteristic for each memdiode 2. Phenomenology of the hysteretic I-V characteristic reads: Fig. 2 illustrates a typical I-V characteristic for a RS device with SB I(V) = I0 (λ)sinh{α(λ)[V − (RS (λ) + Ri )I ] } (1) and SF effects. The electroforming step is not shown here. The SB and SF 2 M. Saludes-Tapia et al. Solid State Electronics 194 (2022) 108312 Fig. 3. Simulated R-V curves for each memristor in the CRS structure (a) and (b), and the curve for the corresponding CRS structure (c). The curves were simulated with the model script reported in this work (see APPENDIX, Figs. 11 and 12). The green arrows indicate the voltage sweep direction. Fig. 4. Schematic circuit for (a) the CRS structure consisting of two memdiodes (X1 and X2) anti-serially connected. The CRS model consists of a six-port sub­ circuit: three for the I-V characteristics. Thanks to the accessible central terminal, the subcircuit allows rep­ resenting the curves of the individual RS devices and the CRS device; three terminals are useful for obtaining the conductance of each device in the CRS structure, and the total conductance; (b) internal implementation of the QMM for the X1 memdiode. The memory circuit controls the conduction charac­ teristics. The labels of the schematics (a) and (b), indicate the name of elements in the script shown in Fig. 11. RE and RS are the series resistances connected to the opposite-biased diodes that lead to the sinh dependence. BD corresponds to Eq.1 of the model. The current generator (BH) is driven by the voltage Vc (Eq. (2)) and it is used to store the memory state in the capacitor CH. RPP is a parallel resistance required by the current generators. 3 M. Saludes-Tapia et al. Solid State Electronics 194 (2022) 108312 Fig. 5. Experimental and model results for different transition metal oxides as switching layers: (a) for a symmetric Tantalum oxide-based CRS structure [24]; (b) TiN/TiOxNy/TiO2-x/Pt memristors forming a CRS structure [25] and (c) two Ti/HfO2/Hf-based structures anti-serially connected [14]. The insets show the parameter values considered for the simulations. where I0 (λ) = Imin +(Imax − Imin )λ is the current amplitude factor. Imin LTSpice using an equivalent circuital approach with behavioral compo­ (imin in the script) and Imax (imax in the script) are calibration param­ nents and sources (see Fig. 4). A remarkable feature of the proposed eters for the minimum and maximum currents, respectively. V is the model is that the SET event not only can be triggered by a SET voltage VS voltage across the device terminals, RS (λ) (rs) a variable series resis­ but alternatively by a threshold current ISB (isb) (see Fig. 2). This gives tance, Ri (ri) a fixed series resistance, and α(λ) a fitting parameter. For rise to the SB effect because of the completion of the filament. The model the sake of completeness, α (amin and amax) and RS (rsmax and rsmin) contains other parameters for the fine-tuning of the simulated curves. In can be described by relationships similar to that used for I0 . (1) re­ particular, the γ (gam) parameter in the RESET ridge function (not sembles the I-V relationship for two opposite-biased diodes with shared considered before [12]) is used for modeling the low-current SF effect series resistance (see Fig. 4(b)). Eq.(1) replaces the Lambert function and detected in many devices. These little but crucial details lead to the the Hermite-Padé approximation considered in [12]. The second equa­ variety of behaviors observed in the experimental curves. In this regard, tion relates the memory state 0 ≤ λ ≤ 1 (H0 in the script) to the voltage it is worth mentioning the connection of these parameters (ISB and γ) drop across the constriction VC = V − Ri I through the recursive hyster­ with the possibility of generating digital or analog ON and OFF transi­ esis operator [11]: tions in the CRS curves. The key issue behind the observation of abrupt { [ ← ]} ON transitions is a noticeable SB effect in the individual devices (trig­ λ(VC ) = min R(VC ), max λ(VC ), S(VC ) (2) gered by ISB). Similarly, abrupt OFF transitions are obtained by gener­ ating abrupt RESET transitions in the individual devices (γ = 0). The where S and R are the so-called SET and RESET ridge functions same considerations apply to the table with legs R-V curves as will be (sigmoidal curves in this case), respectively, which physically represent discussed in Section 5. the ion/vacancy movement (see the model script in the APPENDIX). Their behavioral expressions are S(VC) ={1 + exp[− ηS (VC – if(I > ISB,VT, 4. Experimental and simulated CRS I-V characteristics VS))]}− 1 and R(VC) ={1 + exp[− ηR λγ (VC − VR)]}− 1, where ηS (etas) and ηR (etar) are transition rates and VS (vs) and VR (vr), the SET and RESET In order to assess the versatility of the QMM for CRS devices, we first (← ) voltages, respectively. λ VC is the memory state value a timestep report some fitting results using experimental data found in the litera­ ture. A similar approach was followed in [10] but with a more complex before (hysteretic behavior). Equations (1) and (2) are implemented in 4 M. Saludes-Tapia et al. Solid State Electronics 194 (2022) 108312 Fig. 6. Experimental and model results for different dielectric materials: (a) a-C(amorphous-Carbon)/ CNT-based memristors forming a CRS structure [26]; (b) for two-sided graphene oxide doped silicon oxide-based memristors forming a CRS structure [27] and (c) SiO2/GeSe-based CRS structure [1]. Notice that the I-V characteristic is not symmetric. The insets show the parameter values considered for the simulations. and less robust model, the DMM. For the sake of clarity, the model pa­ Notice the progressive RESET transitions achieved through the effective rameters are indicated in the inset of each figure. Fig. 5 illustrates voltage reduction parameter gam in the RESET process; Fig. 6(c) illus­ experimental and simulation results for transition metal oxide-based trates fully digital CRS transitions for two Pt/SiO2/GeSe/Cu devices [1]. structures: Fig. 5(a) shows the CRS behavior for two bilayer Pd/Ta2O5- Again, the general behavior is well captured by our model. It is worth x/TaOy/Pd combined devices in log-linear axis [24]. The behavior is mentioning that, though in all the cases we attempted to use model symmetric for both voltage polarities, the transitions HRS-LRS are parameter values as close as possible to their corresponding observables, abrupt (digital transmission windows) with good separation between it was sometimes difficult to identify the optimum values. The reason is the SET and RESET events; Fig. 5(b) corresponds to a combination of that the current behavior is affected by a combination of parameters and TiN/TiOxNy/TiO2-x/Pt devices [25]. The structure exhibits analog the only information available is the final CRS curve. For the sake of transitions and a large transmission window; Fig. 5(c) illustrates the I-V simplicity, we assumed initial states λ(0) = 0 and λ(0) = 1 for each curve for combined TiN/HfO2/Hf devices [14]. In this plot, the SET and memdiode. This is only important for the first I-V curve since, after this, RESET transitions are abrupt and have associated SB and SF effects, the hysteretic loop enters into the stationary cycle. respectively. Notice the small departures of the experimental curve at the end of the RESET transitions and how the model is able to capture 5. Experimental and simulated R-V characteristics the detail. Next, Fig. 6 illustrates I-V curves for CRS structures that do not contain a transition metal oxide as the switching layer: Fig. 6(a) Instead of the I-V characteristic, many papers on RS report the shows results for the I-V curve of carbon nanotubes (CNT)-based devices conductance or resistance of the device at a fixed bias as a function of the [26]. The parameter values used in this simulation are very different programming voltage (G-V or R-V). This is often referred to as the from those considered in previous cases because the switching voltages remnant conductance or resistance and for a given voltage it provides are notably higher and the currents lower; Fig. 6(b) shows experimental direct information on the read current of the structure. This is basically and simulation results for graphene/Zr-based structures [27]. As re­ the current evolution measured at a fixed bias, usually a low voltage ported by these authors, the two-sided graphene oxide (GO) structures within the linear operating regime of the device. The same concept exhibit an intrinsic current restriction ability and uniform switching (the applies to the CRS case. Experimentally, the G-V or R-V curves are ob­ model can also be applied in this case because of its behavioral nature). tained by applying pulses of increasing magnitude and measuring the 5 M. Saludes-Tapia et al. Solid State Electronics 194 (2022) 108312 Fig. 7. Experimental and model results for different kinds of the table with legs experimental curves. (a) symmetrical triangular legs of hysteresis loop for Pt/PZT/Pt device [28], (b) symmetrical lengthened legs of hysteresis loop for Ag/PCMO/LaO device [29], and (c) asymmetrical hysteresis loop curve for Pt/Ta2O4.7/TaO1.67/Pt [23]. The insets show the parameter values considered for the simulations. current at a low voltage in between the large pulses. This is not necessary unavailable information on the individual I-V curves. Fig. 7(b) shows the in the case of simulations since the low voltage conductance of the de­ R-V curve for a Ag/PCMO/LaO device [29]. Notice the good agreement vice can be straightforwardly obtained from the model circuit (it is between experiment and simulation. Even though the legs seem to be implicitly assumed that this operation does not affect the memory state thin and sharp, the voltage span is from − 15 V to 15 V. Finally, Fig. 7(c) of the device). Our model script provides this information through the shows the R-V characteristic for an asymmetric device (Pt/Ta2O4.7/ terminals G-, G+, and G. While G+ and G- correspond to the conductances TaO1.67/Pt). The curve is obtained by applying after each write voltage of each device in the CRS structure, G refers to its total conductance. In pulse a low voltage reading pulse of 0.1 V. The obtained results indicate the proposed model, the conductances are calculated as follows: from a high dependence on the maximum and minimum voltages applied to (1), it is possible to obtain the low-voltage current flowing through each the device [23]. To simulate these curves, we have used the same device (neglecting the series resistance effect) as: methodology as in the case of the I-V characteristics. All the parameter values used to fit the curves are in the inset of each plot. I(V) ≈ I0 (λ)sinh[α(λ)V] (3) To conclude, simulation results corresponding to different values of so that the low-voltage conductance (sinh(x)≈x) reads: the model parameters are illustrated. The attention is focused here on the table with legs. Figs. 8, 9, and 10 show the effects of modifying the G± = I0± (λ)α± (λ) (4) model parameters around certain prescribed values. In all the cases, the Since the two memdiodes are series connected, we can calculate the curves correspond to the second hysteretic loop because the transient total conductance as: effects caused by the initial simulation conditions need to be eliminated. Fig. 8 shows the modification of the curves under small variations of the 1 1 1 = + (5) model parameters associated with the ON-OFF transitions for asym­ G G+ G− metric CRS curves. Fig. 9 shows the effects of the same parameters for The table with legs (R-V) is then obtained from the G-V curve since R symmetric CRS devices. Finally, Fig. 10 shows the effects of some spe­ = 1/G. Fig. 7 exhibits a number of R-V curves for different RS devices cific parameters on the R-V curves corresponding to symmetric CRS reported in the literature. For instance, Fig. 7(a) shows the R-V curve for devices with narrow and long legs. These results are intended to be a a Pt/PZT/Pt structure. The observed behavior is attributed to switching guide for the potential user of our model. events in the Schottky-type interfaces which are assumed to be serially combined. Each interface is modulated by the ferroelectric polarization of the material [28]. The HRS regime is hard to fit because of the 6 M. Saludes-Tapia et al. Solid State Electronics 194 (2022) 108312 Fig. 8. Parameter values sweep for asymmetrical curves (kind (c) shown in Fig. 10): (a) and (b) show the SET process parameters, (c) and (d) show the RESET process parameter values. Fig. 9. Parameter values sweep for triangular legs (kind (a) shown in Fig. 10): (a) and (b) show the modification of the curve corresponding to changes in the slopes, (c) and (d) show changes corresponding to changes in the SET and RESET process parameter values, respectively. 7 M. Saludes-Tapia et al. Solid State Electronics 194 (2022) 108312 Fig. 10. Parameter values sweep of lengthened legs of the curve (kind (b) in Fig. 10): (a) shows the modification of the hysteresis loop varying the resistances, (b) and (c) show the modifications changing the SET process parameters, and (d) shows the modifications corresponding to changes in one of the RESET parameters. 6. Conclusions Appendix Complementary resistive switching (CRS) has been proposed as a key The code shown in Fig. 11 for LTSpice XVII corresponds to two anti- element to control the crosstalk effects in memristor-based crossbar serially connected memdiode structures. This results in the CRS arrays. In this paper, we have reported and discussed a compact behavior. The inset of Fig. 12 illustrates the circuit used to simulate all behavioral approach based on the quasi-static memdiode model (QMM). We showed that the proposed subcircuit is able to simulate a wide va­ riety of experimental curves. The model for each individual device consists of two equations, one for the electron transport and a second equation for the memory state of the device. Crucial elements within this description are the snapback and snapforward effects. When both structures are combined, the CRS behavior emerges under the applica­ tion of a voltage sweep. The concept can be extended to the case of the curve called table with legs, which is nothing but the resistance of the device measured at a fixed bias as a function of the writing signal. It was shown that the model is also able to represent these kinds of curves within the same framework and without the necessity of incorporating any other particular element. Declaration of Competing Interest The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper. Acknowledgments This work was supported by the Spanish Ministry of Science, Inno­ vation, and Universities through projects TEC2017-84321-C4-1-R and TEC2017-84321-C4-4-R. Fig. 11. LTSPice script for the compact QMM used for simulating the CRS structures. The label CRS identifies the six-terminal subcircuit with 6 pins: +, c, and - are the three terminals of the device used to describe the I-V character­ istics, G+, G-, and G are the terminals which describe the conductances measured at low voltages. 8 M. Saludes-Tapia et al. Solid State Electronics 194 (2022) 108312 Fig. 12. CRS model curves obtained with the script shown in Fig. 11. The inset of the figure shows the schematic used for the simulation. The red line is the I-V characteristic and the green line is the hysteresis loop (R-V) curve. the curves. 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Key Role of [10] Saludes-Tapia M, Poblador S, Gonzalez MB, Campabadal F, Sune J, Miranda E. Oxygen-Vacancy Electromigration in the Memristive Response of Ferroelectric Tunability Properties and Compact Modeling of HfO2-Based Complementary Devices. Phys Rev Appl 2020;14(4):1–22. Resistive Switches Using a Three-Terminal Subcircuit. IEEE Trans Electron Devices [29] Chen X, Strozier J, Wu NJ, Ignatiev A, Nian YB. A study of the symmetry properties 2021;68(12):5981–8. and multi-state nature of perovskite oxide-based electrical pulse induced [11] Miranda E. Compact Model for the Major and Minor Hysteretic I-V Loops in resistance-change devices. New J Phys 2006;8. Nonlinear Memristive Devices. IEEE Trans Nanotechnol 2015;14(5):787–9. [12] Miranda, EA. “Compact Modeling of Complementary Resistive Switching Devices Using Memdiodes,” IEEE Trans. Electron Devices, Electron Devices, IEEE Trans. on, IEEE Trans. Electron Devices, vol. 66, no. 6, p. 2831, 2019. 9 M. Saludes-Tapia et al. Solid State Electronics 194 (2022) 108312 Mercedes Saludes Tapia received the bacheloŕs degree in JORDI SUÑÉ is a full professor of Electronics at the Universitat physical chemistry from the University of Barcelona and the M. Autonoma de Barcelona (UAB). He is the coordinator of the S degree in advanced nanoscience and nanotechnology from NANOCOMP research group, dedicated to the modeling and the Autonomous University of Barcelona, where is currently simulation of electron devices with a multi-scale approach. His pursuing the PhD degree in computational nanoelectronics. main contributions are in the area of gate oxide reliability for Her current research interests include electrical charac­ CMOS technology. In 2008, he received the IBM Faculty award terization and compact modeling of resistive switching devices. for a long-lasting collaboration with IBM Microelectronics in this field. Since 2008, he has worked in the area of memristive devices and their application to neuromorphic circuits. In 2010, he received the ICREA ACADEMIA award and, in 2012 and 2013, he was awarded the Chinese Academy of Sciences Pro­ fessorship for Senior International Scientists, for a collaboration with IMECAS (Beijing, China). He has (co)authored more than 400 papers (h-index = 44) in international journals and relevant conferences, including 14 IEDM papers, several invited papers, and five tu­ torials on oxide reliability at the IEEE-IRPS. Recently, he launched a new research group/ network (neuromimeTICs.org) dedicated to the application of neuromorphic electronics to Mireia Bargallo Gonzalez received the degree in physics from artificial intelligence and to dissemination activities. the University of Barcelona, Barcelona, Spain, and the Ph.D. degree on the topic of stress analysis and defect characteriza­ tion techniques of semiconductor materials and devices, from Katholieke Universiteit Leuven, Leuven, Belgium, in 2011. She ENRIQUE MIRANDA is Professor at the Universitat Autonoma pursued her Ph.D thesis with the Interuniversity Microelec­ de Barcelona (UAB), Spain. He has a PhD in Electronics Engi­ tronics Center (imec), Leuven, Belgium. neering from the UAB (1999) and a PhD in Physics from the In 2011, she joined the Institut de Microelectrònica de Universidad de Buenos Aires, Argentina (2001). He received Barcelona (IMB-CNM, CSIC). Her current research interests numerous scholarships and awards including: RAMON y CAJAL include electrical characterization, modeling and applications (UAB), DAAD (Technical University Hamburg-Harburg), of resistive switching devices. MATSUMAE (Tokyo Institute of Technology, Japan), TAN CHIN TUAN (Nanyang Technological University, Singapore), WALTON award from Science Foundation Ireland (Tyndall National Institute), Distinguished Visitor Award (Royal Acad­ Francesca Campabadal received the Ph.D. degree in physics emy of Engineering, UK), CESAR MILSTEIN (CNEA, Argentina), from the Universitat Autònoma de Barcelona, Bellaterra, Spain, Visiting Professorships from the Abdus Salam International Centre for Theoretical Physics, in 1986. She joined the Institut de Microelectrònica de Barce­ Slovak Academy of Sciences, Politecnico di Torino, Leverhulme Trust (University College lona, Consejo Superior de Investigaciones Científicas, Barce­ London, UK), and Nokia Foundation (University of Turku, Finland). He serves as member lona, Spain, in 1987, where she is currently a Research of the Distinguished Lecturer program of the Electron Devices Society (EDS-IEEE) since Professor. Her current research interests include the deposition 2001 and as Associate Editor of Microelectronics Reliability since 2003. He has authored of high-k dielectric layers, their electrical characteristics, and and co-authored around 300 peer-review journal papers. the resistive switching phenomena in RRAM devices. 10