Microelectronics Journal 133 (2023) 105715 Contents lists available at ScienceDirect Microelectronics Journal journal homepage: www.elsevier.com/locate/mejo Straightforward bias- and frequency-dependent small-signal model extraction for single-layer graphene FETs Nikolaos Mavredakis a, *, Anibal Pacheco-Sanchez a, Wei Wei b, Emiliano Pallecchi b, Henri Happy b, David Jiménez a a Departament D’Enginyeria Electrònica, Escola D’Enginyeria, Universitat Autònoma de Barcelona, Bellaterra, 08193, Spain b Univ. Lille, CNRS, UMR 8520 - IEMN, F-59000 Lille, France A R T I C L E I N F O A B S T R A C T Keywords: We propose an explicit small-signal graphene field-effect transistor (GFET) parameter extraction procedure based RF circuit Design on a charge-based quasi-static model. The dependence of the small-signal parameters on both gate voltage and Small-signal compact model frequency is precisely validated by high-frequency (up to 18 GHz) on-wafer measurements from a 300 nm device. Graphene transistor (GFET) These parameters are studied simultaneously, in contrast to other works which focus exclusively on few. Efficient Bias- and frequency-dependence procedures have been applied to GFETs for the first time to remove contact and gate resistances from the Y- parameters. The use of these methods yields straightforward equations for extracting the small-signal model parameters, which is extremely useful for radio-frequency circuit design. Furthermore, we show for the first time experimental validation vs. both gate voltage and frequency of the intrinsic GFET non-reciprocal capacitance model. Accurate models are also presented for the gate voltage-dependence of the measured unity-gain and maximum oscillation frequencies as well as of the current and power gains. 1. Introduction compact models are prerequisite for an adequate design of the afore­ mentioned circuits. An abundant amount of such GFET models has been Research on graphene devices (GFETs) is on the rise and prevails the demonstrated so far [14–24]. Usually, Meyer-like [25] equivalent cir­ state of the art of RF applications with emerging two-dimensional cuits have been used [14–18,22,23] which might offer straightforward technologies [1]. Exceptional extrinsic maximum oscillation fre­ and fast computations but do not ensure charge conservation in the quencies (fmax) above 100 GHz have been reported [2] whereas, for intrinsic device. A charge-based model, firstly introduced in Ref. [19] short-channel GFETs with gate lengths in the range of 100–500 nm, fmax and afterwards used elsewhere [20,21,24], takes into consideration the and extrinsic unity-gain cut-off frequency (ftEXT) are commensurate non-reciprocal characteristics of intrinsic capacitances hence, it gua­ when compared with Si MOSFETs [3 (Fig. 3d-e)-4] of similar dimensions rantees charge conservation. All the preceding works however, lack of [5,6]. Such prominent performance despite the still premature phase of concurrently validating with measured data, both the bias- and the GFET technology, has driven circuit designers to demonstrate frequency-dependence of most of the small-signal parameters such as fundamental analog and RF circuits such as mixers [7,8], low noise [9] intrinsic capacitances CGS, CGD, CGG, CDG, CSD (G, S, D are the gate, and power amplifiers [10], frequency multipliers [11], receivers [12] source and drain of the device, respectively), intrinsic and extrinsic ftINT, and balun architectures [13]. These RF circuits have been enabled ftEXT and fmax, small-signal current and unilateral power gains, |h21| and mainly by table-based/empirical models which are of practical use but U as summarized in Table 1. A non-quasi-static (NQS) model is proposed lack of a correct description of internal device phenomena and hence, in Ref. [24] but is not validated with experiments; such NQS effects are the reproducibility and feasibility of such applications might be out of the scope of the present study. Notice that, even though a questionable. charge-based scheme is claimed in Ref. [20] and hence, non-reciprocal Thus, reliable physics-based transport-RF/small-signal GFET capacitances are considered, CDG which differ from CGD under such * Corresponding author. E-mail address: Nikolaos.mavredakis@uab.cat (N. Mavredakis). https://doi.org/10.1016/j.mejo.2023.105715 Received 5 December 2022; Received in revised form 13 January 2023; Accepted 26 January 2023 Available online 3 February 2023 0026-2692/© 2023 The Authors. Published by Elsevier Ltd. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by- nc-nd/4.0/). N. Mavredakis et al. Microelectronics Journal 133 (2023) 105715 Table 1 Small-signal model parameters and their validation in the literature. (NDS-Nu­ merical Device Simulations). Validations Parameters References w/NDS vs. VGS All intrinsic capacitances [19] w/meas. vs. VGS CGS, CGD, ft [20] w/meas. vs. freq |h21|, U [20] w/NDS vs. VGS All intrinsic capacitances, ft, fmax [21] w/meas. vs. freq at 3 VDS values |h21|, U [21] conditions, (in contrast to Meyer-like approaches) is not presented.1 Hence, the main goal of the current work is to provide an extensive picture of both bias- and frequency-dependent GFET modeling of all the crucial small-signal parameters in comparison with measured data. Our methodology is based on an accurate charge-based model [19,21] in contrast to most previous works. Our efforts are focused on the quasi-static (QS) regime below ftEXT, which is a valid consideration for applications such as RF amplifiers. The implementation of effective procedures for contact [23,26,27] and gate resistances’ [5,6,28] RC, RG elimination, permits the extraction of straightforward expressions for all measured. Intrinsic parameters which can be a helpful tool for circuit designers in terms of fast first-order model estimation [18]; this is not the case for more intricate equations derived from complicated RC, RG removal methods [[21] (equations 6-17)]. Fig. 1. (a) Schematic of the GFET under test (b) charge based small-signal equivalent circuit. gmi, gdsi are the intrinsic transconductance and output 2. DUT and measurement setup conductance, respectively. Cm=CDG-CGD where CGS, CGD, CSD, CDG are the intrinsic capacitances. Parasitic capacitances CGSP, CGDP, CSDP, gate access The proposed modeling method has been validated with on-wafer resistance RG, source and drain contact resistances RS, RD, respectively, are also DC-RF measurements from a single-layer short-channel aluminum depicted. Intrinsic model parameters are within the dashed box. back-gated CVD GFET with a ~4 nm thick Al2O3 used as a dielectric layer between graphene and gate as shown elsewhere [29,30]. The total device, respectively. The extracted parameters are presented in Table 2 width is W = 12 × 2 μm = 24 μm (where 2 is the number of gate fingers) where μ is the carrier mobility, Cback the back-gate. and the length L = 300 nm. Au source-drain contacts are used which can capacitance, VBSO the flat-band voltage, Rc-RG the contact and access ensure very low RC.W in range of 125 Ω μm resulting in higher trans­ gate resistances, Δ the inhomogeneity of the electrostatic potential, conductance gm and ft, fmax [3]. DC measurements have been conducted which is related to the residual charge density, and usat the saturation with an Agilent E5260B parameter analyzer where VDS is set to 0.5 V velocity. Note that analogous μ values have been reported for similar while VGS is swept from 0 to 0.7 V in the p-type region of the GFET GFETs in Refs. [20,27]. A detailed methodology for the transport model operation. S-parameters have been also measured at the aforementioned parameters’ extraction has been proposed in Ref. [32] while the very bias points with an Agilent E8361A Vector Network Analyzer from 2 low Rc value can be confirmed in Refs. [22,30]. Notice that the rest of the GHz up to 18 GHz; an “OPEN” dummy structure, fabricated on the same parameters have been appropriately tuned to better fit the ℜ(Y21DEV) chip, has been used for de-embedding. and ℜ(Y22DEV) experiments. While in Ref. [20] a precise physics-based transport model is presented which accounts separately for hole and 3. Parameter extraction electron contributions, this is not essential in the present study since experiments only from p-type regime below Dirac voltage VDirac are A schematic cross section of the GFET under test is presented in under discussion. Fig. 2 depicts the real (left plots) and imaginary (right Fig. 1a while the charge-based small-signal equivalent circuit used in plots) parts of all the YDEV vs. VGS at four frequencies (f = 2, 5, 10, 18 this study is shown in Fig. 1b (cf. [[31]]). Apart from the intrinsic device, GHz) for VDS = 0.5 V and the model captures decently the de-embedded source and drain contact resistances RS = RD = RC/2 (regarded equal as measured data for all the bias and frequency conditions, including gm in Refs. [14–16,19,21] which does not affect the calculation of intrinsic and gds. An RG = 37 Ω alike [22] (for a similar GFET technology) is used parameters since: VDSin = VDS-ID(RS + RD)) and RG are also considered as in the Verilog-A simulations (cf. Table 2) as it provides the best fitting for well as extrinsic parasitic capacitances CGSP, CGDP, CSDP. The latter are the measured L (YDEV). An overestimation of the experiments by the eliminated through an OPEN de-embedding procedure. Thus, device L (Y22DEV) model is observed at f = 10, 18 GHz at lower VGS, probably de-embedded Y-parameters are given by: YDEV=YMEAS-YOPEN where caused by substrate. YMEAS are the raw measurements and YOPEN the OPEN structure measured Y-parameters, respectively. To correctly extract the small-signal model, the transport model parameters should be precisely Table 2 estimated. Those are extracted from the measured ℜ(Y21DEV) and IV extracted Parameters. ℜ(Y22DEV) which are the extrinsic (after de-embedding but before RG and Parameter Units Lg = 300 nm RC removal) transconductance gm and output conductance gds of the μ cm2/(V•s) 400 Cback μF/cm2 1.87 VBS0 V 1 1 Besides, no de-embedding structures are used in Ref. [20] and the parasitic Rc Ω 4 elements are extracted through electromagnetic simulations. It is also RG Ω 37 meV 110 mentioned in the text that the maximum ft where they fit their model [20 Δ usat m/s 5.106 (Fig. 5f)] is achieved without de-embedding. 2 N. Mavredakis et al. Microelectronics Journal 133 (2023) 105715 26,27], is applied to both the model and the experimental data and thus, YINT(RG) yield [5,28]: [ ] ω2 RG C2GG ω2 RG CGG CGD YINT(RG) = = gmi − ω2 RG CGG CDG gdsi + ω2 RG CGG CGD [ ] ωCGG − ωCGD +j ( ) ( ) (1a) − ω CGD + Cm + gmi RG CGG ω CGD + CSD − gdsi RG CGG where Cm=CDG-CGD is the gate transcapacitance accounting for the non- reciprocity of capacitances [5,21], as mentioned earlier; RG contribution is still in the YINT(RG). Intrinsic Y-parameters YINT without RG effect are given by Refs. [21,31]: [ ] jωCGG − jωCGD YINT = (1b) gmi − jωCDG gdsi + jω(CGD + CSD ) From equations (1a), (1b), CGG, CGD, CGS can be extracted as: ( ) ( ) I Υ11INT(RG) I(Υ11INT ) I Υ12INT(RG) I(Υ12INT ) CGG = = ,CGD = − = ,CGS =CGG ω ω ω ω − CGD (2) where ω is the angular frequency. Intrinsic transconductance gmi = ℜ(Y21INT) and CDG can be derived from: ( ) R Υ21INT(RG) = gmi − ω2 RG CGG CDG (3a) ( ) ( ) I Υ21INT(RG) = − ω CDG + gmi RG CGG (3b) as all the other terms in equations (3a) and (3b) are known. Similarly, intrinsic output conductance gdsi = ℜ(Y22INT) and CSD are estimated from: ( ) R Υ22INT(RG) = gdsi + ω2 RG CGG CGD (4a) ( ) ( ) I Υ22INT(RG) = ω CGD + CSD − gdsi RG CGG (4b) Thus, |h21| and U can be easily calculated as [21]: ⃒ ⃒ ⃒ Y21 ⃒ |h21 (ω)| = ⃒⃒− ⃒ → |h21 (2πf t )| = 1 (5) Y11 ⃒ 2 |Y12 − Y21 | U(ω) = − → U(2π f max ) = 1 (6) 4(R (Υ11 )R (Υ22 ) − R (Υ12 )R (Υ21 )) and ft, fmax can also be derived as the frequencies where |h21| and U equal to unity (0 dB), respectively [4,5,21], (cf. equations (5) and (6)). The explicit parameter extraction procedure described in the present Section is illustrated in the diagram of Fig. 3. The frequency-dependence of |ℜ(YDEV(INT))| and |L (YDEV(INT))| is depicted in the main panels (in­ Fig. 2. Real (left plots) and imaginary (right plots) part of de-embedded Y- sets) of Fig. 4a and b, respectively, at VGS = 0 V; ℜ(YINT) and L (YINT) are parameters (ℜ[YDEV], L [YDEV]) vs. gate voltage VGS with markers representing extracted from equations (1)–(4). gm, gds measurements are practically the measurements and lines the model for a GFET with gate width W = 24 μm constant vs. f with the models following this trend while an alike and length L = 300 nm at different operation frequencies f = 2 GHz (a, e), f = 5 frequency-dependence is recorded for gmi, gdsi; ℜ(Y12INT) = ℜ(Y11INT) = GHz (b, f), f = 10 GHz (c, g) and f = 18 GHz (d, h) at a drain voltage VDS = 0.5 V 0 according to equation (1b) thus, they are not included in the inset of ℜ[Y21DEV] (=gm) is shown in inset of (a) vs. VGS where the model is extended up Fig. 4a. L (YDEV) experiments demonstrate an almost to Dirac voltage VDirac = 1.2 V. proportional-to-frequency behavior and they are successfully validated by the models, apart from L (Y22DEV) above 10 GHz, as mentioned coupling [33] (not considered in the model) as the thickness of the earlier; an identical behavior is observed for L (YINT). substrate SiO2/Si is around 300 nm/300 μm [30]. Dynamic substrate Notice that YDEV experiments directly reflect the frequency response coupling effects in GFETs are out of the scope of this work. A |gm| value of the device, as they are extracted after the de-embedding procedure of ~10 mS is recorded at the maximum measured VGS = 0.7 V which before applying QS equations (1)–(4). Thus, the nearly proportional-to- agrees with [22] for a similar GFET. The gm model is extended up to frequency L (YDEV) (cf. Fig. 4b) as well as the approximately constant-to- VDirac = 1.2 V in the inset of Fig. 2a where |gm| gets maximum at VGS = frequency gm, gds (cf. Fig. 4a) strongly indicate a QS regime of 0.9 V before starting to decrease steeply until it reaches 0 at the Dirac operation up to f = 18 GHz [31]. Hence, charging resistances RGS, RGD point [21]. connected in series with CGS, CGD to model NQS effects in [[24,31]], are To calculate the intrinsic QS small-signal parameters, RC, RG must be ignored in the QS equivalent circuit in Fig. 1b because of the removed from YDEV. For RC, an advanced recently proposed method [23, 3 N. Mavredakis et al. Microelectronics Journal 133 (2023) 105715 Fig. 3. Small-signal parameter extraction flow chart. Fig. 4. (a) |ℜ[YDEV]| (|ℜ[YINT]| in inset), (b) |L [YDEV]| (|L [YINT]| in inset) vs. f at VGS = 0 V and intrinsic capacitances CGG, CGD, CDG, CSD, respectively vs. VGS at different operation frequencies f = 2 GHz (c), f = 5 GHz (d), f = 10 GHz (e) and f = 18 GHz (f) and vs. f in insets for VGS = 0 (c), 0.6 V (d) for a GFET with W = 24 μm and L = 300 nm at VDS = 0.5 V. Markers represent the measurements and lines the models. aforementioned YDEV frequency-dependent relations. The latter sim­ last term of equation (2)). They are also shown vs. frequency at VGS = 0, plifies the first-order NQS model proposed in [[31] (equations (8.4.62), 0.6 V in the two insets of Fig. 4c and d, respectively, to describe their (8.4.69), (8.4.70), (8.4.72))] to the QS approach of the present study (cf. frequency-dependence as well. A slight VGS-dependence is recorded for equations (1)–(4)). Measured L (Y22DEV) fluctuates from the propor­ measured CGG, CGD, CDG for a VGS below 0.7 V towards p-type region in tional to frequency dependence above 10 GHz (cf. Fig. 4b) and such agreement with findings in bibliography [20–22]. The intrinsic capaci­ behavior is associated with substrate coupling, as it has been already tance models extracted by the straightforward procedure described in mentioned. There could be arguments that this trend is due to NQS ef­ equations (1)–(4), qualitatively capture this dependence. Regarding fects at frequencies near ftEXT but in such case the rest of the experi­ CDG, which differs from CGD in contrast to a Meyer-like model as mental L (YDEV) parameters would have also been affected and since the non-reciprocities are considered, such a VGS-dependent model experi­ latter is not the case as detailed before, NQS effects are discarded. mental validation is presented for the first time in GFETs. Notice in the insets of Fig. 4c and d, the weak frequency-dependence of measured CGG, 4. Results and discussion CGD, CDG derived directly from the almost proportional-to-frequency L (Y11INT(DEV)), L (Y12INT(DEV)), L (Y21INT(DEV)), respectively, (cf. All the intrinsic capacitances in the equivalent circuit of Fig. 1 are Fig. 4b) through equations (2)-(3); the accuracy of the models for both fully characterized in the present analysis. Both modeled and measured VGS points is also remarkable. Recorded CGG, CGD values around capacitances are presented in Fig. 4c–f, vs. VGS at four frequencies (f = 2, ~85–45 fF, respectively, are consistent with those referred in Ref. [22] 5, 10, 18 GHz) (apart from CGS which can be easily extracted from the for a similar GFET. These values in Ref. [22] are without RG, RC removal 4 N. Mavredakis et al. Microelectronics Journal 133 (2023) 105715 Fig. 5. Simulated CGG, CGD, CDG, CSD, respectively, vs. f for VGS = 0 V for a GFET with W = 24 μm and L = 300 nm at VDS = 0.5 V. Solid lines: Extracted RG = 37 Ω, dashed lines: RG value decreased by a factor of 2. but RC is very low for the specific GFET while CGG, CGD, are RG-inde­ pendent as is apparent from equation (2). Similarly to CDG, the VGS- and frequency-dependence of a GFET CSD capacitance model is for the first time validated with experimental data and presented here. Measured CSD increases towards strong p-type regime at lower frequencies up to 5 GHz and the model follows this trend as depicted in Fig. 4c and d. For f ≥ 10 GHz in Fig. 4e and f, the model overestimates the experiments due to substrate coupling, following L (Y22INT(DEV)) behavior (cf. Fig. 2g, h, 4b) as CSD and L (Y22INT(DEV)) are strongly related through equations (1a)-(1b), (4a)-(4b). This can also be observed in the insets of Fig. 4c and d where CSD is depicted vs. fre­ quency, where measured values start to decrease abruptly after f ≥ 10 GHz in contrast to the model which remains approximately fixed with frequency. Experimental CSD fluctuates from a maximum of ~55 fF at VGS = 0 V, f = 2 GHz to a minimum of ~10 fF at VGS = 0.7 V, f = 18 GHz and such values are much higher than those in Ref. [21] which is the only prior work where CSD experiments are reported. This is associated with an increased RG = 37 Ω (cf. Table 2). The effect of RG on CDG, CSD (CGG, CGD, CGS are RG-independent as mentioned before), is illustrated in Fig. 5 where simulated intrinsic capacitances are shown vs. frequency at VGS = 0 V for the extracted value of RG as well as for a decreased one Fig. 6. Intrinsic and extrinsic cut-off frequencies ftINT, ftEXT, respectively, (a) (~half). The application of a smaller RG value decreases the estimated and extrinsic maximum oscillation frequency fmax (b) vs. VGS, small-signal CSD (~-5 fF); such negative experimental values are recorded in current gain |h21| in (a) inset and unilateral power gain U in (b) inset vs. f Ref. [21] also. Notice that CDG values for the low RG are also comparable for VGS = 0 V for a GFET with W = 24 μm and L = 300 nm (green lines: L = 100 with the measured values in Ref. [21] which, as in CSD case, is the only nm) at VDS = 0.5 V (black lines) and VDS = 0.1 V (red lines). Markers represent the measurements and lines the model; dashed lines: ftINT model. previous study that presents CDG measurements. Critical RF figures of merit (FoMs) such as ftINT, ftEXT, fmax, |h21| and U are also examined thoroughly. They are extracted from RF measure­ maximum measured VGS = 0.7 V which agree with a similar GFET in ments and modeled in terms of bias and frequency. |h21|, U are inversely Ref. [22]; operation frequencies above ftEXT would induce NQS effects proportional to frequency [4,20,21,23] while the frequencies where which are beyond the scope of the present study. Simulated ftEXT, ftINT they become equal to unity are defined as ft and fmax, respectively [4,21] and fmax considerably increase for the smaller L and significantly (cf. equations (5) and (6)). Notice that if |h21| in equation (5) is extracted decrease for the lower VDS case, respectively, confirming previous from YDEV (|h21DEV|) where RC, RG are still considered, ftEXT can be experimental findings [3–5]. The insets in Fig. 6a and b depict experi­ derived while if |h21| is calculated from YINT (|h21INT|) after RC, RG mental |h21DEV|, U, respectively, vs. frequency at VGS = 0 V, VDS = 0.5 V elimination then ftINT is. where their inversely proportional relation with frequency is well estimated. That said, |h21INT|, ftINT depend directly on gmi while | described by the models. h21DEV|, ftEXT on gm, respectively. Extrinsic U and consequently, extrinsic There are no studies presenting the bias-dependence of |h21|, U FoMs fmax can be extracted by equation (6) if YDEV are considered. Simulated in GFETs and this is accomplished in the present work. Both experi­ ftINT, ftEXT in Fig. 6a and fmax in Fig. 6b are precisely validated with mental and simulated |h21DEV| and |h21INT| in Fig. 7a as well as U in measurements vs. VGS at VDS = 0.5 V; the models are extended up to Fig. 7b are shown vs. VGS at VDS = 0.5 V for four operating frequencies (f VDirac = 1.2 V and also presented for VDS = 0.1 V (red lines) and for L = = 2, 5, 10, 18 GHz); the models are extended up to VDirac = 1.2 V for the 100 nm at VDS = 0.5 V (green lines). The small RC value for the GFET 2 GHz case and also depicted for VDS = 0.1 V (blue lines) and for L = 100 under test accounts for the trivial degradation of ftEXT in comparison nm at VDS = 0.5 V (green lines) for the aforementioned frequency. The with ftINT. Both measured and simulated ft, fmax increase with VGS models account well for the measured data at any bias and frequency similarly to |gm| (cf. Fig. 2a), whereas, models continue to increase up to point while both |h21|, U present a similar trend vs. VGS as ft, fmax and | VGS = 0.9 V and then fall abruptly towards Dirac point [20,21]. ftEXT, gm|. Maximum measured |h21DEV|, |h21INT|, U are placed at VGS = 0.7 V, f fmax values around 19 and 12 GHz, respectively, are extracted at the = 2 GHz while simulations rise up to VGS = 0.9 V before starting to 5 N. Mavredakis et al. Microelectronics Journal 133 (2023) 105715 from a 300 nm RF GFET for several VGS values up to f = 18 GHz. Explicit efficient methods are applied for the removal of Rc and RG. As a result, straightforward expressions for small-signal parameters and most sig­ nificant RF FoMs have been obtained. Despite the high computational power available almost everywhere nowadays, such direct and explicit derivations are critical for an initial acceptable estimation of model parameters, which is crucial from circuit design aspect. On the contrary, complex procedures for Rc and RG elimination lead to complicated mathematics [21] which are hard to be handled. for fast circuit-analysis. Moreover, optimization routines deployed for the extraction of a plethora of parameters for compact modeling purposes of complete transistor technologies (tens or hundreds on-wafer devices with different footprints and a broad range of bias-points) result in more accurate results if a sufficient first estimation of the parameters is provided to the algorithm. Such calculations can be accomplished with methodologies similar to the one proposed in the present study. The successful experimental validation of the frequency-dependence of all GFET intrinsic capacitance models has not been shown elsewhere. Besides, both bias- and frequency-dependent CSD, CDG capacitance models are for the first time demonstrated and validated accurately with experiments. Note that CDG is considered equal to CGD in an inaccurate Meyer-like approach which is not the case in this work, while CSD had almost always been neglected in relevant bibliography, so far. The effect of RG on CSD, CDG is also highlighted. Finally, the accurate VGS behavior of |h21|, U models in comparison with experiments is also presented for the first time and reveals a strong relation with ft, fmax trend vs. VGS. Credit author statement Nikolaos Mavredakis: Conceptualization, Methodology, Software. Nikolaos Mavredakis, Anibal Pacheco-Sanchez: Data curation, Writing – original draft. Nikolaos Mavredakis, Anibal Pacheco-Sanchez: Visuali­ zation. Wei Wei, Emiliano Pallecchi: Investigation. Henri Happy, David Jiménez: Supervision. Nikolaos Mavredakis, Anibal Pacheco-Sanchez: Writing- Reviewing and Editing. Declaration of competing interest Fig. 7. |h21| (a) and U (b) vs. VGS for a GFET with W = 24 μm and L = 300 nm at different operation frequencies f = 2, 5, 10, 18 GHz (green lines: L = 100 nm, The authors declare that they have no known competing financial f = 2 GHz) at VDS = 0.5 V. Markers represent the measurements and lines the model; dashed lines: |h21INT| model. Models are also shown for VDS = 0.1 V at f interests or personal relationships that could have appeared to influence = 2 GHz with blue lines. the work reported in this paper. Data availability decrease steeply, similarly with ft, fmax and |gm|. Finally, modeled | h21DEV|, |h21INT| and U are quite reduced at the lower VDS agreeing with Data will be made available on request. experiments in Ref. [20], while they are heightened at the smaller L. In general, a decent percentage error is recorded between experi­ ments and models from 0.3% in the best case to 10% Acknowledgements In the worst case for most of the parameters investigated. The latter strengthen the validity of the present study, especially after considering This work has received funding from the European Union’s Horizon that more than 10 small-signal parameters are extracted simultaneously 2020 research and innovation programme under grant agreements No in terms of both their bias- and frequency-dependence. Regarding CSD, GrapheneCore3 881603, from Ministerio de Ciencia, Innovación y the error remains low around 5% below f = 5 GHz but it considerably Universidades under grant agreements RTI2018-097876-B-C21(MCIU/ increases at 10 and 18 GHz, respectively, as it is expected due to sub­ AEI/FEDER, UE), FJC2020-046213-I and PID2021-127840NB-I00 strate coupling contribution which is not yet included in the model. (MCIN/AEI/FEDER, UE) and by the European Union Regional Devel­ Experimental discrepancies are also recorded for U at frequencies near opment Fund within the framework of the ERDF Operational Program of ftEXT in agreement with bibliography for both MOSFETs [28] and GFETs Catalonia 2014–2020 with the support of the Department de Recerca i [20], resulting in higher errors and less accuracy of the model in this Universitat, with a grant of 50% of total cost eligible. GraphCAT project regime. reference: 001-P-001702. 5. Conclusion References [1] M. Saeed, P. Palacios, M.-D. Wei, E. Baskent, C.-Y. Fan, B. Uzlu, K.-T. Wang, A charge-based small-signal GFET model and a parameter extraction A. Hemmetter, Z. Wang, D. Neumaier, M.C. Lemme, R. Negra, Graphene-based methodology have been presented and validated with measurements microwave circuits: a review, Adv. Mater. (2021), https://doi.org/10.1002/ adma.202108473. 6 N. Mavredakis et al. Microelectronics Journal 133 (2023) 105715 [2] Y. Wu, X. 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