This is the accepted version of the journal article: Claramunt, Sergi; Palau, Gerard; Arnal Rus, August; [et al.]. «Exploita- tion of OTFTs variability for PUFs implementation and impact of aging». Solid-state electronics, Vol. 207 (Sep. 2023), arat. 108698. 4 pàg. DOI 10.1016/j.sse.2023.108698 This version is available at https://ddd.uab.cat/record/283390 under the terms of the license Exploitation of OTFTs variability for PUFs implementation and impact of aging S. Claramunt1, G. Palau1, A. Arnal2, A. Crespo-Yepes1, M. Porti1, S. Ogier3, E. Ramon2, M. Nafria1 1Universitat Autònoma de Barcelona, Dept. Eng. Dept., Bellaterra, Spain 2Institut de Microelectrònica de Barcelona (IMB-CNM-CSIC), Bellaterra, Spain. 3SmartKem Ltd., Neville Hamlin Building, Thomas Wright Way, NetPark, Sedgefield, TS21 3FG, UK. E-mail address of corresponding author: marc.porti@uab.cat Abstract 2. Experimental Commercial Organic Thin Film Transistors The analysed OTFTs are four-terminal transistors (OTFT) have been characterized to evaluate their with a top gate configuration and multiple channels and variability and reliability. The feasibility of gold contacts (Fig. 1) [7]. The devices were fabricated implementing Physical Unclonable Functions (PUFs) by SmartKem Ltd. (UK), using gold contacts, and their based on these devices has been evaluated, taking proprietary stack of materials TRUFLEX based on BL advantage of the high variation in the electrical (Base Layer), OSC (Organic Semiconductor), OGI characteristics among different OTFTs. The eventual (Organic Gate Insulator), SRL (Sputter Resistant impact of device aging on PUFs reliability has been Layer, PL (Passivation Layer). The fabrication process preliminary explored. combines sputtering, spin coating and photolithographic steps. 1. Introduction Devices with W=640µm and L=3µm have been The use of Organic materials in electron devices studied in this work. ID-VG curves have been measured such as Thin Film Transistors (TFT) has increased at VDS=-20V in 74 OTFTs, for TZV evaluation. Back during the last years due to their low-cost, Gate was grounded in all stresses and measurements. sustainability and easy fabrication [1,2]. Their potential Fig. 2a shows some examples of the measured ID-VG use in the Internet of Things (IoT) and wearable curves. Note the large device-to-device variability, electronics has been explored, thanks to the possibility which can be accounted for by the dispersion in the of fabricating smart and flexible electronic systems [3]. threshold voltage and carrier mobility. HCI-like tests Due to the good characteristics of these (VG= -30V, VD= -30V) during 4500s have also been materials/devices, many works have been focused on carried out to evaluate the aging of this kind of devices. the study of the properties of the materials themselves The stress was periodically interrupted to measure ID- [4-6] or the performance of the devices fabricated with VG curves, from which the induced degradation was them [7]. However, few works have been devoted to evaluated. the study of the variability and reliability of OTFTs [4, 8, 9]. Since the fabrication of organic materials is not a mature process yet, the devices show high initial variability (i.e., Time-Zero Variability, TZV). TZV of OTFTs is improving as the technology matures, but it is possible to make devices with some larger variability, to be exploited for some security and cryptography applications. The randomness associated to the heterogeneous nature of organic materials and the fabrication processes can be used as a source of entropy for the implementation of Physical Unclonable Functions (PUFs) [10, 11]. Regarding the reliability of OTFTs, it is also an issue of concern. The usual operating conditions of this kind of devices can be a serious drawback, due to the high voltages needed (in the range of 10-30V). Therefore, the aging mechanisms activated during the device operation/stress and their impact on the organic layer and on the device performance must be studied in detail [12]. This task could be further complicated because of the large Fig.1. (a) 3D sketch of the OTFT and (b) its corresponding number of materials available, so different strategies section. are necessary to evaluate the origin of the possible 3. PUF performance reliability issues. For the PUF implementation, the current through the channel (ID) at VDS= -20V and VGS=0V obtained from In this work, the TZV of OTFTs has been analyzed, the transfer characteristics of OTFTs has been used as to evaluate the feasibility of using them to implement parameter to generate the digital key of the security PUFs. The effects of electrical HCI-like stresses have primitive. Fluctuations in these currents show a been also preliminary analyzed, and the eventual Gaussian random distribution, as shown in Fig. 2b. For effects on PUF performance discussed. the evaluation of the PUFs quality, as one PUF contains one or several devices (depending on the PUF’s number of bits), a large number of devices is needed. The experimental µ and VTH statistical distributions For this reason many OTFT ID-VG curves have been have been used to generate, using Montecarlo methods, generated, based on the experimental results. To do the µ and VTH of many OTFTs. From these values, the this, eq. (1) is considered to describe the ID-VG curves: ID at VGS=0V and VDS=-20V has been obtained using Eq. 1. The obtained ID values were digitized into 8-bits 𝐼 𝜇𝐶 𝑉 𝑉 (Eq. 1) binary words. From these 8-bit sequences, cryptographic keys of 8, 16 and 32 bits have been generated by using one or concatenating 2 or 4 By fitting the data in Fig, 2a, the mobility (µ) and digitized currents of different devices. In this regard, threshold voltage (VTH) of the 74 experimentally 200 PUFs with 8, 16 and 32 bits, were built, measured devices has been obtained. Fig. 3 respectively. For the 8, 16 and 32 bits PUFs case, 200, corresponds to the µ vs VTH plot obtained from the 400 and 800 OTFT ID-VG were generated. experimental data. There is a high TZV, but no To evaluate the quality of the proposed PUFs, their correlation between the parameters is observed. uniformity and uniqueness have been analyzed. We have first evaluated the bit uniformity, which is a measure of the random distribution of “0s” and “1s”, and should be ideally 0.5. The uniformity of a given PUF can be evaluated by dividing the number of 1-bits by the total number of bits of the key, using Eq (2): 𝑃𝑈𝐹 𝑈𝑛𝑖𝑓𝑜𝑟𝑚𝑖𝑡𝑦 ∑ 𝐾 𝑥 100% Eq (2) being s the key size and Ki is the bit at the position i of the PUF, which can be ‘0’ of ‘1’. Table I shows the average and standard deviation of the uniformity of the 8, 16 and 32 bits PUFs. Note that its average value is 20 very close to 50% in all cases, demonstrating the uniformity of the PUFs. (b) To determine the degree of correlation between two 15 different PUFs, we have evaluated the device uniqueness. This parameter can be determined from the Frequency 10 inter-device Hamming Distance (HD), which measures the number of bits that are different, with respect to the total number of bits of the key, when two different 5 PUFs are compared. The inter-device HD between any two PUF devices can be defined with Eq (3): 0 0 100 200 300 400 500 2 𝐻𝐷 𝐾 , 𝐾 /Current/ (uA) 𝐷𝑒𝑣𝑖𝑐𝑒 𝑢𝑛𝑖𝑞𝑢𝑒𝑛𝑒𝑠𝑠 𝑥100% 𝑞 𝑞 1 𝑠 Fig.2. (a) ID-VG curves of some OTFTs for VDS= -20V (L=3µm and W=640µm), and (b) Histogram of the ID values at VG=0V and VDS= -20V. Eq (3) 0,060 where Ki and Kj are s-bit keys of the ith PUF device and the jth PUF device among q different PUFs, 0,055 respectively. Table I also shows the average and standard deviation of the uniqueness of the 8, 16 and mobility (cm2/Vs) 0,050 32 bits PUFs. Again, the average value of this parameter is very close to 50% in all cases, 0,045 demonstrating the uniqueness of the PUFs. Note, however, that in both cases (uniformity and 0,040 uniqueness), the standard deviation depends on the number of bits, as expected. While for 8 bits the 0,035 dispersion is quite high, it can be reduced by increasing the number of bits (although more devices are required 26 28 30 32 34 36 38 to implement a PUF). Therefore, these results Vth (V) demonstrate that the fluctuations in carrier transport in Fig. 3. Dispersion of µ vs VTH corresponding to the OTFTs can be potentially used as an entropy source for experimental values. the implementation of PUFs. 8 bits 16 bits 32 bits change is observed at short stress times. As expected, Unif. Uniq. Unif. Uniq. Unif. Uniq the value of ID depends on VG but note that the trend 𝑋 0.48062 0.5094 0.4809 0.5095 0.5092 0.5060 can also be VG dependent, since the current can 𝜎 0.1596 0.1821 0.1113 0.1297 0.0743 0.0938 increase (VG=0V) or decrease (VG=-30V). In any case, the current tends to saturate for large enough stress Table 1. Mean (𝑋 and standard deviation (𝜎 ) of the time. uniformity and uniqueness for the 200 PUFs of 8 bits, 16 bits To show the impact of the ID change during device and 32 bits generated words. operation on the PUF performance, the VG=0V case has been considered; the binarized levels (6 bits for this example) are shown in figure 5 (top). Because of the 4. OTFTs Degradation Impact stress, the device current shift can be large enough to After the analysis of the TZV, the impact of a HCI- drive ID to other binarized levels (as observed in Fig. like electrical stress has also been preliminary 5), producing the failure of the PUF functionality (i.e., evaluated, to explore whether it may eventually impact the generated code has changed). The Error Time, the PUF performance. With this aim, a standard which we have defined as the time needed to observe a measurement-stress-measurement procedure was change in the code because of aging, as a function of adopted. The stress (VG= -30V, VD= -30V, and a total the number of bits (length of the binary key) has been stress time of 4500s) was periodically interrupted (at analyzed. 300s intervals) to determine its impact on the device performance, by measuring the ID-VG curve. Fig. 4a shows an example of the typical evolution of ID measured during the different stress phases and Fig. 4b the ID-VG curves registered during the interruptions. As observed from the I-t curve, there is a large relaxation of the current after the interruptions, so that the measured current could be strongly dependent on the time elapsed since the bias removal. Moreover, during each of the stress phases, large transients are observed, which lead to a net increase of the current. Fig. 5: Evolution of the ID at VG=0V (blue circles) and at VG= -30V (red circles), obtained from the ID-VG (at VDS= - 20V) recorded when the HCI-like stress was interrupted as a function of the stress time. Dashed lines correspond to the binarized levels. 600 3000 Error time [seconds] 500 Area/bit [m2] 2500 400 300 2000 200 1500 100 Fig. 4: Evolution of ID during the interrupted stress (red 1000 0 circles), and (inset figure) the fresh ID-VG characteristics 6 7 8 9 10 11 12 (red line) and the corresponding curves obtained during the #bits/device stress interruptions. Fig. 6: Error time (red circles) and area per bit (blue Fig. 5 shows the ID obtained from the ID-VG curves squares) as a function of the number of bits per device. (VDS= -20V) at VG= 0V (blue circles) and VG= -30V Device dimensions are W=640µm and L=3µm. (red circles), as a function of the stress time. A rapid Fig. 6 (red circles) shows that the Error Time References exponentially decreases with the number of bits per [1] C.D. Dimitrakopoulos, P.R.L. Malefant, Organic Thin device, due to the power law dependence of the number Film Transistors for Large Area Electronics, Adv. Mater. of binarized levels on the number of bits. Therefore, to 2002;14:99-117. DOI: 10.1002/1521- reduce code errors related to aging (see Fig. 5), ID 4095(20020116)14:23.0.CO;2-9 [2] C. Reese, M. Roberts, M. Ling, Z. Bao, Organic thin film should be digitized with a smaller number of bits. But, transistors, Materials Today 2004;7:20-27. DOI: to get a more reliable PUF (larger Error Time due to 10.1016/S1369-7021(04)00398-0 the aging) with a pre-determined number of bits, more [3] X. Guo, Y. Xu, S. Ogier, T. Nga Ng, M. Caironi, A. devices should be used to implement the PUF, what Perinot, et al., Current status and opportunities of organic means an increase of the area of the PUF. This is thin-film transistor technologies, IEEE Trans. Electron demonstrated in Figure 6 (blue squares), since the area Devices 2017;64(5):1906-1921. DOI: per bit linearly decreases when the number of bits per 10.1109/TED.2017.2677086 device increases. So, Fig. 6 points out to a trade-off [4] S. H. Ko, H. Pan, C. P. Grigoropoulos, C. K. Luscombe, between the number of bits per device (to maximize the J. M. J. Fréchet, and D. Poulikakos, All-inkjet-printed flexible electronics fabrication on a polymer substrate by Error Time due to the aging) and the PUF area. low-temperature high-resolution selective laser sintering of Finally, the Error Time as a function of the metal nanoparticles, Nanotechnology 2007;18(34):345202. cumulative stress time was also analyzed. Fig. 7 shows DOI: 10.1088/0957-4484/18/34/345202. this curve for the case of 8 bits, pointing out that the [5] H. Jeong, S. Baek, S. Han, H. Jang, S. H. Kim, and H. S. largest the device degradation, the longest the Error Lee, Novel Eco-Friendly Starch Paper for Use in Flexible, time. Though for this case, the error time continuously Transparent, and Disposable Organic Electronics, Adv. increases, a slight tendency towards saturation is Funct. Mater. 2018;28(3):1704433. DOI: observed since degradation slows down with the stress 10.1002/adfm.201704433. time (Fig. 5). This observation suggests that [6] N. A. Azarova, J. W. Owen, C. A. McLellan, M. A. Grimminger, E. K. Chapman, J. E. Anthony and O. D. introducing some aging before the PUF is operated Jurchescu, Fabrication of organic thin-film transistors by may be beneficial to implement reliable PUFs. spray-deposition for low-cost, large-area electronics, Org. Electron. physics, Mater. Appl. 2010;11(12):1960–5. DOI: 125 10.1016/j.orgel.2010.09.008 Error Time [seconds] 8 bits [7] A. Arnal, A. Crespo-Yepes, E. Ramon, Ll. Terés, R. 100 Rodríguez and M. Nafría, DC characterization and fast small- signal parameter extraction of organic thin film transistors 75 with different geometries, IEEE Electron Device Letters 2020;41(10):1512-5. DOI: 10.1109/LED.2020.3021236. 50 [8] F. Rasheed, M. S. Golanbari, G. Cadilha Marques, M. B. Tahoori and J. Aghassi-Hagmann, A Smooth EKV-Based 25 DC Model for Accurate Simulation of Printed Transistors and Their Process Variations, IEEE Transactions on Electron 0 Devices 2018;65(2):667-73. doi: 10.1109/TED.2017.2786160. 0 1000 2000 3000 4000 [9] H. Matsui, Y. Takeda, S. Tokito, Fexible and printed Cumulative Stress Time [seconds] organic transistors: From materials to integrated circuits, Organic Electronics 2019;75:105432. Fig. 7: Error Time dependence on the cumulative stress for https://doi.org/10.1016/j.orgel.2019.105432 the case of 8 bits. 10] Z. Qin, M. Shintani, K. Kuribara, Y. Ogasahara and T. Sato, Organic Current Mirror PUF for Improved Stability Against Device Aging, in IEEE Sensors Journal 5. Conclusion 2020;20(14):7569-7578, doi: 10.1109/JSEN.2020.2986077. The large TZV of OTFTs can be exploited to [11] D. Kim, S. Im, D. Kim, H. Lee, C. Choi, J. Ho Cho, H. implement binarized ID-based PUFs that exhibit good Ju, J. Ah Lim, Reconfigurable Electronic Physically Uniformity and Uniqueness. The reliability of the Unclonable Functions Based on Organic Thin-Film Transistors with Multiscale Polycrystalline Entropy for PUFs has been preliminary evaluated, considering Highly Secure Cryptography Primitives, Advanced device aging during an HCI-like stress. Results show Functional Materials, 2023;33:2210367, that the shift of the device current during its operation ttps://doi.org/10.1002/adfm.202210367 could be a drawback for this kind of applications and [12] A. Ruiz, S. Claramunt, A. Crespo-Yepes, M. Porti, M. that its impact depends exponentially on the number of Nafria, H. Xu, C. Liu, Q. Wu, Exploiting the KPFM bits used for the binarizing process. However, these capabilities to analyze at the nanoscale the impact of preliminary results show that the current shift electrical stresses on OTFTs properties, Solid-State decreases with the stress time. So, the application of a Electronics, 2021;186:108061. DOI: stress previously to the PUF operation may be https://doi.org/10.1016/j.sse.2021.108061. beneficial to its reliability. Further work is needed to evaluate the performance of such ‘aged’ PUFs. Acknowledgements This work was supported by grant PID2019- 103869RB-C32 /AEI/ 10.13039/501100011033.