Resum

There is considerable evidence of the need for a semiconductor technology which exceeds the limitations imposed by silicon across a wide spectrum of industrial applications. Wide bandgap semiconductor, such as silicon carbide (SiC), gallium nitride (GaN) and diamond, offer the potential to overcome both the temperature and voltage blocking limitations of Si. SiC is nowadays the most attractive candidate, offering significant potential advantages at both high temperature and high voltage levels whilst benefiting from tractable materials technology. Moreover, SiC is the only that can be thermally oxidized to form a high quality native oxide (SiO2), which enables the fabrication of MOS based devices.

However, very near the definitive emergence, the SiC technology needs to address two fundamental limitations: The price of the wafers and the poor SiC/SiO2 interface. The high density of imperfections encountered at the SiC/oxide interface represents a major obstacle in the development of functional SiC devices. The main efforts of this thesis have been directed to the detection and reduction of interface traps in the oxide/SiC interface. To achieve this demanding objective, two different ways have been contemplated: (1) Investigations have been carried out to improve the thermal oxidation or even to improve the formation of the interface with alternative techniques as nitridation or deposited oxides. (2) The classical insulator made up with SiO2 has been replaced by other innovative dielectrics.

Innovative gate fabrication processes have been proposed in this thesis using deposited SiO2 gate oxides from PECVD with silane and TEOS as precursors. SiO2-TEOS deposited oxides are an alternative to thermal oxidation. 4H-SiC MOSFET with mobilities up to 38-45 cm2/Vs [(0001) face] and 216 cm2/Vs [(11-20) face] have been fabricated.

We have demonstrated that the thermal oxidation of Ta2Si is a simple way to achieve a high-k dielectric on SiC (and on Si). We have fabricated one of the first well behaved high-k MOSFET on SiC with a mobility peak up to 45 cm2/Vs

In the last section, a field-effect mobility model including Coulomb scattering at interface traps has been proposed fitting the experimental channel mobility of SiC MOSFETs and the device behavior depending on the density of interface traps, the substrate doping level and the temperature.

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