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Modelización y fabricación de dispositivos supresores TVS para protección en aplicaciones de baja tensión / por Jesús Roberto Urresti Ibáñez ; director, Salvador Hidalgo Villena
Urresti Ibáñez, Jesús Roberto
Hidalgo Villena, Salvador, dir. (Centro Nacional de Microelectrónica)

Publicació: Bellaterra : Universitat Autònoma de Barcelona, 2009
Resum: The contious reduction in size and work voltage of the new generation integrated circuits (ICs) requires the reducction of the thickness of the different layers that make up (especially the gate oxides and levels of isolation between conductors), in order to increase its density and speed of integration, reducing its energy consumption. However, these improvements involve an increase in their sensitivity to external perturbations such as fluctuations in the electricity network, capacitive coupling or electrostatic discharge (ESD). Although there is a wide range of electronic devices designed to protect ICs from such disturbances avoiding destruction (Zener diodes, thyristors, etc. ), The continuous reduction of voltage operation and increasing the frequency of work has required a major research effort to adapt the protective devices to the new conditions of operation. The main features that should satisfy any device designed to protect an electronic system are: fast response, low parasitic capacity, driving in low resistance, high absorption capacity of current, low leakage current in reverse, minimum size, low cost, should not interfere in the normal mode of operation of the system that protects and must maintain unchanged its electrical characteristics over time. In high voltage applications, Zener diodes and thyristors are the most used, both in format as a discreet way to the monolithic IC, for protection against ESD phenomena. However, new generations of ICs for mobile applications (portable computers, telecommunications, remote control systems, etc. ) Require devices capable of working at low voltage and low energy consumption (in order to maximize the life of batteries ). Under these conditions, the protection of traditional elements are not optimal, so that further protection devices with low voltage and low shooting leakage current in his block state. In this situation, the use of new protective structures based on a process of rupture by emptying (punch-through) improves the characteristics of those based on a break by avalanche (base of the traditional components). Thus, this study aims to analyze, optimize, design and produce new elements of protection by breaking with punch-through, known as Transient Voltage Suppressors (TVS), which improve the performance of Zener diodes in applications from low tension (less than 3 V). Thus, Chapter 1 describes the main electric perturbation and sources that originated, along with a description of its effect on the CIs. It also provides a description of the different existing devices suppressors, with special emphasis on TVS, the main topic for this work. In Chapter 2 presents a study of the vertical TVS based in the punch-through effect, which analyzes the electrical characteristics of its two configurations (TVS 3 layers, TVS 4 layers). It also presents the theoretical model of rupture developed for this type of structures as well as the verification of it through numerical simulations and experimental data. Chapter 3 deals with the design, fabrication and characterization of vertical TVS. We show the technological processes done and the improvements are detailed, demonstrating the superiority of TVS 4 layers respect to the TVS 3 layers and Zener diodes. Chapter 4 presents the first study published on lateral punch-through TVS devices intended to be integrated with the circuitry to protect. The study was conducted for different configurations proposed in technology Bulk Silicon, compared among themselves and choose the configuration that shows better characteristics. This chapter also presents a novel way of using the field plate to reduce the breakdown voltage into the lateral TVS. Finally, and as a line of the future, assessing the feasibility of integrating lateral TVS devices in SOI (Silicon-On-Insulator) substrates. Finally, Chapter 5 shows the manufacturing of lateral TVS. Details the technological process, the design of masks, clean room manufacturing in the characterization and finally, whether technological, using techniques of Reverse Engineering, as electric.
Nota: Bibliografia
Nota: Tesi doctoral - Universitat Autònoma de Barcelona. Escola Tècnica Superior d'Enginyeria, Departament d'Enginyeria Electrònica, 2008
Nota: Consultable des del TDX
Nota: Títol obtingut de la portada digitalitzada
Drets: ADVERTIMENT. L'accés als continguts d'aquesta tesi doctoral i la seva utilització ha de respectar els drets de la persona autora. Pot ser utilitzada per a consulta o estudi personal, així com en activitats o materials d'investigació i docència en els termes establerts a l'art. 32 del Text Refós de la Llei de Propietat Intel·lectual (RDL 1/1996). Per altres utilitzacions es requereix l'autorització prèvia i expressa de la persona autora. En qualsevol cas, en la utilització dels seus continguts caldrà indicar de forma clara el nom i cognoms de la persona autora i el títol de la tesi doctoral. No s'autoritza la seva reproducció o altres formes d'explotació efectuades amb finalitats de lucre ni la seva comunicació pública des d'un lloc aliè al servei TDX. Tampoc s'autoritza la presentació del seu contingut en una finestra o marc aliè a TDX (framing). Aquesta reserva de drets afecta tant als continguts de la tesi com als seus resums i índexs.
Llengua: Castellà.
Document: Tesis i dissertacions electròniques ; doctoralThesis
Matèria: Dispositius electrònics ; Descàrregues elèctriques ; Electroestàtica
ISBN: 9788469198247

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