Split Capacitive Boosting Technique for High-Slew-Rate Single-Ended Amplifiers : Design and Optimization
Gagliardi, Francesco (Università di Pisa. Dipartimento di Ingegneria dell'Informazione)
Bruschi, Paolo (Università di Pisa. Dipartimento di Ingegneria dell'Informazione)
Piotto, Massimo (Università di Pisa. Dipartimento di Ingegneria dell'Informazione)
Dei, Michele (Università di Pisa. Dipartimento di Ingegneria dell'Informazione)

Date:	2025
Abstract:	Parallel-type slew-rate enhancers (PSREs) improve the driving capability of operational transconductance amplifiers (OTAs) for large capacitive loads. While capacitive-boosting (CB) techniques enhance PSRE efficiency in fully-differential designs, their application to single-ended configurations-common in off-chip load driving-remains unexplored. This work identifies a critical limitation of standard CB in single-ended unity-gain buffers: severe slew-rate degradation due to large common-mode input swings. To overcome this, we propose a novel split CB (SCB) technique for single-ended PSREs that strategically divides the boosting capacitance. Simulated in a 0. 18-µm CMOS process, the proposed method achieves a ×5. 53 reduction in settling time compared to standard CB when driving a 1-nF load. With only 4 µA quiescent current under a 3. 3-V supply, it attains a 1% settling time of 2. 56 µs for 2. 64-V steps, demonstrating robust performance across process-voltage-temperature variations. This technique enables low-power, high-speed interfaces for drivers of off-chip devices.
Grants:	European Commission 101115182
Rights:	Aquest document està subjecte a una llicència d'ús Creative Commons. Es permet la reproducció total o parcial, la distribució, la comunicació pública de l'obra i la creació d'obres derivades, fins i tot amb finalitats comercials, sempre i quan es reconegui l'autoria de l'obra original.
Language:	Anglès
Document:	Article ; recerca ; Versió publicada
Subject:	Capacitive boosting ; Slew-rate enhancement ; LCD/OLED drivers ; Single-ended amplifier ; Operational transconductance amplifier (OTA) ; Settling time optimization ; Low-power design ; CMOS analog circuits
Published in:	Electronics, Vol. 14, Num. 16 (August 2025) , art. 3225, ISSN 2079-9292

DOI: 10.3390/electronics14163225

30 p, 5.7 MB

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Articles > Research articles
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