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Pàgina inicial > Articles > Articles publicats > Large-signal model of graphene field-effect transistors. Part I : |
Data: | 2016 |
Resum: | We present a circuit-compatible compact model of the intrinsic capacitances of graphene field-effect transistors (GFETs). Together with a compact drain current model, a large-signal model of GFETs is developed combining both models as a tool for simulating the electrical behavior of graphene-based integrated circuits, dealing with the DC, transient behavior, and frequency response of the circuit. The drain current model is based in a drift-diffusion mechanism for the carrier transport coupled with an appropriate field-effect approach. The intrinsic capacitance model consists of a 16-capacitance matrix including self-capacitances and transcapacitances of a four-terminal GFET. To guarantee charge conservation, a Ward-Dutton linear charge partition scheme has been used. The large-signal model has been implemented in Verilog-A, being compatible with conventional circuit simulators and serving as a starting point toward the complete GFET device model that could incorporate additional non-idealities. |
Ajuts: | European Commission 696656 Ministerio de Economía y Competitividad TEC2012-31330 Ministerio de Economía y Competitividad TEC2015-67462-C2-1-R |
Drets: | Tots els drets reservats. |
Llengua: | Anglès |
Document: | Article ; recerca ; Versió acceptada per publicar |
Matèria: | Compact model ; Drift-diffusion ; Field-effect transistor ; Graphene ; Intrinsic capacitance ; Verilog-A |
Publicat a: | IEEE transactions on electron devices, Vol. 63 Issue 7 (July 2016) , p. 2936 - 2941, ISSN 1557-9646 |
Post-print 6 p, 1.8 MB |