Understanding the bias dependence of low frequency noise in single layer graphene FETs
Mavredakis, Nikolaos (Universitat Autònoma de Barcelona. Departament d'Enginyeria Electrònica)
Garcia Cortadella, Ramon (Institut Català de Nanociència i Nanotecnologia)
Bonaccini Calia, Andrea (Institut Català de Nanociència i Nanotecnologia)
Garrido, Jose (Institut Català de Nanociència i Nanotecnologia)
Jiménez Jiménez, David (Universitat Autònoma de Barcelona. Departament d'Enginyeria Electrònica)

Data:	2018
Resum:	This letter investigates the bias-dependent low frequency noise of single layer graphene field-effect transistors. Noise measurements have been conducted with electrolyte-gated graphene transistors covering a wide range of gate and drain bias conditions for different channel lengths. A new analytical model that accounts for the propagation of the local noise sources in the channel to the terminal currents and voltages is proposed in this paper to investigate the noise bias dependence. Carrier number and mobility fluctuations are considered as the main causes of low frequency noise and the way these mechanisms contribute to the bias dependence of the noise is analyzed in this work. Typically, normalized low frequency noise in graphene devices has been usually shown to follow an M-shape dependence versus gate voltage with the minimum near the charge neutrality point (CNP). Our work reveals for the first time the strong correlation between this gate dependence and the residual charge which is relevant in the vicinity of this specific bias point. We discuss how charge inhomogeneity in the graphene channel at higher drain voltages can contribute to low frequency noise; thus, channel regions nearby the source and drain terminals are found to dominate the total noise for gate biases close to the CNP. The excellent agreement between the experimental data and the predictions of the analytical model at all bias conditions confirms that the two fundamental 1/f noise mechanisms, carrier number and mobility fluctuations, must be considered simultaneously to properly understand the low frequency noise in graphene FETs. The proposed analytical compact model can be easily implemented and integrated in circuit simulators, which can be of high importance for graphene based circuits' design.
Ajuts:	Ministerio de Economía y Competitividad TEC2015-67462-C2-1-R European Commission 785219 European Commission 665919 European Commission 732032
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Llengua:	Anglès
Document:	Article ; recerca ; Versió acceptada per publicar
Matèria:	Charge neutrality ; Circuit simulators ; Graphene field-effect transistors ; Low-Frequency Noise ; Mobility fluctuations ; Noise measurements ; Strong correlation ; Terminal currents
Publicat a:	Nanoscale, Vol. 10, Issue 31 (August 2018) , p. 14947-14956, ISSN 2040-3372

DOI: 10.1039/c8nr04939d

Postprint 19 p, 2.2 MB

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